NUC140RE3CN Nuvoton Technology Corporation of America, NUC140RE3CN Datasheet - Page 283
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NUC140RE3CN
Manufacturer Part Number
NUC140RE3CN
Description
IC MCU 32BIT 128KB FLASH 64LQFP
Manufacturer
Nuvoton Technology Corporation of America
Series
NuMicro™ NUC100r
Specifications of NUC140RE3CN
Core Processor
ARM Cortex-M0
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, EBI/EMI, I²C, IrDA, LIN, SPI, UART/USART, USB
Peripherals
Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
45
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Eeprom Size
-
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-LQFP
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
NUC140RE3CN
Manufacturer:
PANASONIC
Quantity:
40 000
Company:
Part Number:
NUC140RE3CN
Manufacturer:
Nuvoton Technology Corporation of America
Quantity:
10 000
Part Number:
NUC140RE3CN
Manufacturer:
NUVOTON
Quantity:
20 000
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Byte Suspend
In master mode, if SPI_CNTRL[19] is set to 1, the hardware will insert a suspend interval 2 ~ 17
serial clock periods between two successive bytes in a transaction word. Both settings of byte
suspend and word suspend are configured in SP_CYCLE. Note that when enable the byte
suspend function, the setting of TX_BIT_LEN must be programmed as 0x00 only (32-bit per
transaction word).
No Slave Select Mode (3-WIRE Mode)
This is used to ignore the slave select signal in slave mode. The SPI controller can work on no
slave select mode (3-WIRE mode) interface including SPICLK, SPI_MISO, and SPI_MOSI when
it is set as a slave device. When the NOSLVSEL bit is set as 1, the controller will start to
transmit/receive data after the GO_BUSY bit is set to 1 and the serial clock appears. In no slave
select signal mode, the SS_LTRIG, SPI_SSR[4], shall be set as 1.
REORDER
00
01
10
11
NuMicro™ NUC130/NUC140 Technical Reference Manual
Description
Disable both byte reorder function and byte suspend interval.
Enable byte reorder function and insert a byte suspend internal (2~17 SPICLK) among
each byte. The setting of TX_BIT_LEN must be configured as 0x00 ( 32 bits/ word)
Enable byte reorder function but disable byte suspend function
Disable byte reorder function, but insert a suspend interval (2~17 SPICLK) among each
byte. The setting of TX_BIT_LEN must be configured as 0x00 ( 32 bits/ word)
Table 5-6 Byte Order and Byte Suspend Conditions
Figure 5-57 Timing Waveform for Byte Suspend
- 283 -
Publication Release Date: June 14, 2011
Revision V2.01
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