PIC18F4585-H/ML Microchip Technology, PIC18F4585-H/ML Datasheet - Page 290
PIC18F4585-H/ML
Manufacturer Part Number
PIC18F4585-H/ML
Description
IC MCU 8BIT 48KB FLASH 44QFN
Manufacturer
Microchip Technology
Series
PIC® 18Fr
Datasheet
1.PIC18F4585-IPT.pdf
(482 pages)
Specifications of PIC18F4585-H/ML
Core Processor
PIC
Core Size
8-Bit
Speed
25MHz
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, HLVD, POR, PWM, WDT
Number Of I /o
36
Program Memory Size
48KB (24K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
3.25K x 8
Voltage - Supply (vcc/vdd)
4.2 V ~ 5.5 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 150°C
Package / Case
44-VQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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PIC18F2585/2680/4585/4680
REGISTER 23-13: RXB0CON: RECEIVE BUFFER 0 CONTROL REGISTER (CONTINUED)
DS39625C-page 288
bit 2
bit 1
bit 0
Legend:
C = Clearable bit
-n = Value at POR ‘1’ = Bit is set
Mode 0:
RXB0DBEN: Receive Buffer 0 Double-Buffer Enable bit
1 = Receive Buffer 0 overflow will write to Receive Buffer 1
0 = No Receive Buffer 0 overflow to Receive Buffer 1
Mode 1, 2:
FILHIT2: Filter Hit bit 2
This bit combines with other bits to form filter acceptance bits <4:0>.
Mode 0:
JTOFF: Jump Table Offset bit (read-only copy of RXB0DBEN)
1 = Allows jump table offset between 6 and 7
0 = Allows jump table offset between 1 and 0
Mode 1, 2:
FILHIT1: Filter Hit bit 1
This bit combines with other bits to form filter acceptance bits <4:0>.
Mode 0:
FILHIT0: Filter Hit bit 0
This bit indicates which acceptance filter enabled the message reception into Receive Buffer 0.
1 = Acceptance Filter 1 (RXF1)
0 = Acceptance Filter 0 (RXF0)
Mode 1, 2:
FILHIT0: Filter Hit bit 0
This bit, in combination with FILHIT<4:1>, indicates which acceptance filter enabled the
message reception into this receive buffer.
01111 = Acceptance Filter 15 (RXF15)
01110 = Acceptance Filter 14 (RXF14)
...
00000 = Acceptance Filter 0 (RXF0)
Note 1: This bit is set by the CAN module upon receiving a message and must be cleared
2: This bit allows same filter jump table for both RXB0CON and RXB1CON.
by software after the buffer is read. As long as RXFUL is set, no new message will
be loaded and buffer will be considered full. After clearing the RXFUL flag, the PIR3
bit, RXB0IF, can be cleared. If RXB0IF is cleared, but RXFUL is not cleared, then
RXB0IF is set again.
R = Readable bit W = Writable bit
Preliminary
‘0’ = Bit is cleared
U = Unimplemented bit, read as ‘0’
x = Bit is unknown
(2)
© 2007 Microchip Technology Inc.
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