PIC16LF1938-I/MV Microchip Technology, PIC16LF1938-I/MV Datasheet - Page 175
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PIC16LF1938-I/MV
Manufacturer Part Number
PIC16LF1938-I/MV
Description
IC MCU 8BIT 28KB FLASH 28UQFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 16Fr
Datasheet
1.PIC16LF1938-IMV.pdf
(452 pages)
Specifications of PIC16LF1938-I/MV
Core Processor
PIC
Core Size
8-Bit
Speed
32MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
25
Program Memory Size
28KB (16K x 14)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 3.6 V
Data Converters
A/D 11x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-UFQFN Exposed Pad
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
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18.2
Each comparator has 2 control registers: CMxCON0 and
CMxCON1.
The CMxCON0 registers (see
Control and Status bits for the following:
• Enable
• Output selection
• Output polarity
• Speed/Power selection
• Hysteresis enable
• Output synchronization
The CMxCON1 registers (see
Control bits for the following:
• Interrupt enable
• Interrupt edge polarity
• Positive input channel selection
• Negative input channel selection
18.2.1
Setting the CxON bit of the CMxCON0 register enables
the comparator for operation. Clearing the CxON bit
disables the comparator resulting in minimum current
consumption.
18.2.2
The output of the comparator can be monitored by
reading either the CxOUT bit of the CMxCON0 register
or the MCxOUT bit of the CMOUT register. In order to
make the output available for an external connection,
the following conditions must be true:
• CxOE bit of the CMxCON0 register must be set
• Corresponding TRIS bit must be cleared
• CxON bit of the CMxCON0 register must be set
2011 Microchip Technology Inc.
Note 1: The CxOE bit of the CMxCON0 register
2: The internal output of the comparator is
Comparator Control
COMPARATOR ENABLE
COMPARATOR OUTPUT
SELECTION
overrides the PORT data latch. Setting
the CxON bit of the CMxCON0 register
has no impact on the port override.
latched with each instruction cycle.
Unless otherwise specified, external
outputs are not latched.
Register
Register
18-1) contain
18-2) contain
Preliminary
18.2.3
Inverting the output of the comparator is functionally
equivalent to swapping the comparator inputs. The
polarity of the comparator output can be inverted by
setting the CxPOL bit of the CMxCON0 register.
Clearing the CxPOL bit results in a non-inverted output.
Table 18-1
conditions, including polarity control.
TABLE 18-1:
18.2.4
The trade-off between speed or power can be opti-
mized during program execution with the CxSP control
bit. The default state for this bit is ‘1’ which selects the
normal speed mode. Device power consumption can
be optimized at the cost of slower comparator propaga-
tion delay by clearing the CxSP bit to ‘0’.
Input Condition
CxV
CxV
CxV
CxV
N
N
N
N
> CxV
< CxV
> CxV
< CxV
PIC16(L)F1938/9
COMPARATOR OUTPUT POLARITY
COMPARATOR SPEED/POWER
SELECTION
shows the output state versus input
P
P
P
P
COMPARATOR OUTPUT
STATE VS. INPUT
CONDITIONS
CxPOL
0
0
1
1
DS41574A-page 175
CxOUT
0
1
1
0
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