DD-160128FC-2B DENSITRON, DD-160128FC-2B Datasheet - Page 15
DD-160128FC-2B
Manufacturer Part Number
DD-160128FC-2B
Description
62M4129
Manufacturer
DENSITRON
Datasheet
1.DD-160128FC-1A.pdf
(45 pages)
Specifications of DD-160128FC-2B
Screen Size
42.926mm
Resolution
160 X 128
Viewing Area (h X W)
28.864mm X 35.575mm
Interface Type
Parallel, Serial
Pixel Size (h X W)
0.045mm X 0.194mm
Voltage Rating
2.8V
Svhc
No SVHC
Rohs Compliant
Yes
SYNCOAM Co., Ltd. SEPS525 Version: 0.2
Window Address Function
When data is written to the on‐chip DDRAM, a window address‐range which is specified by the horizontal
address register(start : MX1[7:0], end : MX2[7:0]) or the vertical address register(start : MY1[7:0], end :
MY2[7:0]) can be written to consecutively. Data is written to addresses in the direction specified by the HC,
VC(increment/decrement), and HV bit(H or V direction). When the image data is being written, data can be
written consecutively without thinking of a data wrap by doing this.
The window must be specified within the DDRAM address area described below, Addresses must be set
within the window address.
Example of Address Operation in the Window Address Specification
MY1[7:0]
MY2[7:0]
Window address‐range specification.
MX1[7:0] = 10h, MY1[7:0] = 2Fh
MY1[7:0] = 20h, MY2[7:0] = 3Fh
00h / H
00h / V
00h / H
7Fh / V
[Restriction on window address‐range setting]
MX1[7:0]
10h / H
3Fh / V
10h / H
20h / V
10h / H
21h / V
(horizontal direction) 00h≤ MX1[7:0] < MX2[7:0] ≤ 9Fh
(vertical direction) 00h ≤ MY1[7:0] < MY2[7:0] ≤ 7Fh
DDRAM address map
HC, VC = 1,1 (increment)
HV = 0 (horizontal writing)
2Fh / H
3Fh / V
2Fh / H
2Fh / H
20h / V
21h / V
MX2[7:0]
9Fh / H
9Fh / H
7Fh / V
00h / V
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