CY7C1049B-12VXC Cypress Semiconductor Corp, CY7C1049B-12VXC Datasheet
CY7C1049B-12VXC
Specifications of CY7C1049B-12VXC
Related parts for CY7C1049B-12VXC
CY7C1049B-12VXC Summary of contents
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... For guidelines on SRAM system design, please refer to the ‘System Design Guidelines’ Cypress application note, available on the internet at www.cypress.com. Cypress Semiconductor Corporation Document #: 38-05169 Rev. *B Functional Description The CY7C1049B is a high-performance CMOS static RAM organized as 524,288 words by 8 bits. Easy memory expansion is provided by an active LOW Chip Enable (CE), an active LOW Output Enable (OE), and tri-state drivers. Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW ...
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... MAX > > < MAX , Com’l CC – 0.3V, CC Com’l L > V – 0.3V, CC < 0.3V Ind’l IN CY7C1049B -15 - 220 195 0.5 Ambient Temperature V CC 0°C to +70°C 4.5V–5.5V –40°C to +85°C -15 -17 Min. Max. Min. Max. 2.4 2.4 ...
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... Tested initially and after any design or process changes that may affect these parameters. Document #: 38-05169 Rev. *B Test Conditions T = 25° MHz 5. 481 Ω 5V 3.0V R2 GND 5 pF 255Ω ≤ (b) CY7C1049B Max. Unit ALL INPUT PULSES 90% 90% 10% 10% ≤ Page [+] Feedback [+] Feedback ...
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... Over the Operating Range Conditions Com’ 2.0V > V – 0. > V – 0. time has to be provided initially before a read/write operation power is less than less than t , and t HZCE LZCE HZOE LZOE HZWE and t HZWE CY7C1049B -15 -17 Min. Max. Min. Max. Unit ...
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... SUPPLY CURRENT Notes: 12. Device is continuously selected HIGH for read cycle. 14. Address valid prior to or coincident with CE transition LOW. Document #: 38-05169 Rev. *B DATA RETENTION MODE 3.0V V > OHA DOE DATA VALID 50% CY7C1049B 3. DATA VALID t HZOE t HZCE HIGH IMPEDANCE 50 Page [+] Feedback [+] Feedback ...
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... If CE goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. 17. During this period the I/Os are in the output state and input signals should not be applied. Document #: 38-05169 Rev SCE SA t SCE PWE t SD DATA VALID [15, 16 SCE PWE t SD DATA VALID IN CY7C1049B Page [+] Feedback [+] Feedback ...
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... Switching Waveforms (continued) Write Cycle No. 3 (WE Controlled, OE LOW) ADDRESS NOTE 17 DATA I/O t HZWE Ordering Information Speed (ns) Ordering Code 12 CY7C1049B-12VC CY7C1049B-12VXC 15 CY7C1049B-15VC CY7C1049B-15VXC CY7C1049B-15VI CY7C1049B-15VXI 17 CY7C1049BL-17VC Document #: 38-05169 Rev. *B [16 SCE PWE t SD DATA VALID Package Name Package Type 51-85090 36-Lead (400-Mil) Molded SOJ ...
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... The inclusion of Cypress products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress against all charges. CY7C1049B 51-85090-*B ...
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... Document History Page Document Title: CY7C1049B 512K x 8 Static RAM Document Number: 38-05169 Issue Orig. of REV. ECN NO. Date Change ** 110209 12/02/01 *A 116465 09/16/02 *B 498501 See ECN Document #: 38-05169 Rev. *B Description of Change SZV Change from Spec number: 38-00937 to 38-05169 CEA Add applications foot note to data sheet, page 1 ...