XC2VP100-6FF1704C Xilinx Inc, XC2VP100-6FF1704C Datasheet - Page 158
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XC2VP100-6FF1704C
Manufacturer Part Number
XC2VP100-6FF1704C
Description
FPGA Virtex-II Pro Family 99216 Cells 1200MHz 0.13um/90nm (CMOS) Technology 1.5V 1704-Pin FCBGA
Manufacturer
Xilinx Inc
Datasheet
1.XC2VP20-5FGG676C.pdf
(430 pages)
Specifications of XC2VP100-6FF1704C
Package
1704FCBGA
Family Name
Virtex-II Pro
Device Logic Units
99216
Number Of Registers
88192
Maximum Internal Frequency
1200 MHz
Typical Operating Supply Voltage
1.5 V
Maximum Number Of User I/os
1040
Ram Bits
8183808
Re-programmability Support
Yes
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FG676/FGG676 Fine-Pitch BGA Package
As shown in
fine-pitch BGA package. The pins in these devices are the same, except for the differences shown in the "No Connects"
column. Following this table are the
Table 7: FG676/FGG676 — XC2VP20, XC2VP30, and XC2VP40
DS083 (v4.7) November 5, 2007
Product Specification
Bank
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
R
Table
7, XC2VP20, XC2VP30, and XC2VP40 Virtex-II Pro devices are available in the FG676/FGG676
IO_L03P_0/VREF_0
IO_L09P_0/VREF_0
IO_L45P_0/VREF_0
IO_L01N_0/VRP_0
IO_L01P_0/VRN_0
IO_L05_0/No_Pair
IO_L50_0/No_Pair
IO_L53_0/No_Pair
Pin Description
IO_L02N_0
IO_L02P_0
IO_L03N_0
IO_L06N_0
IO_L06P_0
IO_L07N_0
IO_L07P_0
IO_L09N_0
IO_L37N_0
IO_L37P_0
IO_L39N_0
IO_L39P_0
IO_L43N_0
IO_L43P_0
IO_L45N_0
IO_L46N_0
IO_L46P_0
IO_L48N_0
IO_L48P_0
IO_L49N_0
IO_L49P_0
IO_L54N_0
IO_L54P_0
FG676/FGG676 Fine-Pitch BGA Package Specifications (1.00mm
Virtex-II Pro and Virtex-II Pro X Platform FPGAs: Pinout Information
www.xilinx.com
Pin Number
G11
H10
H11
E10
E11
D10
C10
H12
F11
J12
D5
D6
G7
D7
C7
H8
G8
H9
G9
D9
C9
E5
E6
F7
E7
F8
E8
B8
A8
F9
E9
XC2VP20
No Connects
XC2VP30
pitch).
Module 4 of 4
XC2VP40
30
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