MAX4702EGE Maxim Integrated Products, MAX4702EGE Datasheet - Page 8

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MAX4702EGE

Manufacturer Part Number
MAX4702EGE
Description
Analog Switch Quad SPDT 16-Pin QFN EP
Manufacturer
Maxim Integrated Products
Type
Analog Switchr
Datasheet

Specifications of MAX4702EGE

Package
16QFN EP
Maximum On Resistance
75@2.7V Ohm
Maximum Low Level Output Current
20 mA
Maximum Turn-off Time
20@3.3V ns
Maximum Turn-on Time
35@3.3V ns
Switch Architecture
SPDT
Power Supply Type
Single
Caution: Do not exceed the absolute maximum rat-
ings because stresses beyond the listed ratings
may cause permanent damage to the devices.
Proper power-supply sequencing is recommended for
all CMOS devices. Always apply V+ before applying
analog signals, especially if the analog signal is not cur-
rent limited. If this sequencing is not possible, and if the
analog inputs are not current limited to <20mA, add a
small-signal diode (D1) as shown in Figure 1. If the ana-
log signal can dip below GND, add D2. Adding protec-
tion diodes reduces the analog range to a diode drop
(about 0.7V) below V+ (for D1), and a diode drop above
ground (for D2). On-resistance increases slightly at low
supply voltages. Maximum supply voltage (V+) must not
exceed +6V.
Low-Voltage, Dual DPDT/Quad SPDT
Analog Switches in QFN
Figure 2. Switching Time
Figure 3. Break-Before-Make Interval
8
_______________________________________________________________________________________
MAX4699
MAX4701
MAX4702
MAX4699
MAX4701
MAX4702
LOGIC
INPUT
LOGIC
INPUT
V
N_
V
N_
Power-Supply Sequencing and
C
V
C
OUT
L
L
NC_
NO_
IN_
INCLUDES FIXTURE AND STRAY CAPACITANCE.
INCLUDES FIXTURE AND STRAY CAPACITANCE.
NO_
OR NC_
IN_
= V
GND
N_
(
R
Overvoltage Protection
L
GND
R
+ R
L
ON
V+
)
V+
V+
V+
COM_
COM_
R
300Ω
R
300Ω
L
L
V
OUT
C
35pF
C
35pF
L
L
V
OUT
Adding protection diode D2 causes the logic threshold
to be shifted relative to GND. TTL compatibility is not
guaranteed when D2 is added.
Protection diodes D1 and D2 also protect against some
overvoltage situations. With Figure 1’s circuit, if the sup-
ply voltage is below the absolute maximum rating, and
if a fault voltage up to the absolute maximum rating is
applied to an analog signal pin, no damage will result.
The MAX4702 features a V
lower logic input thresholds down to 1.0V min for V
the quad SPDT configuration. Power-up V
been powered with a minimum of 1.5V to ensure proper
operation of the device.
OUTPUT
SWITCH
LOGIC
INPUT
LOGIC
INPUT
V
OUT
Test Circuits/Timing Diagrams
V
V
IH
IL
0
V
V
IH
IL
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
V
t
50%
ON
50%
OUT
V
0.9 x V
L
t
D
Logic Input (MAX4702)
0UT
L
logic input that allows for
t
OFF
0.9 x V
t r < 5ns
t f < 5ns
0.9 x V
OUT
OUT
L
after V+ has
IH
in

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