MAX9671CTH+T Maxim Integrated Products, MAX9671CTH+T Datasheet - Page 20

• Manufacturer Part Number: MAX9671CTH+T
• Description: IC AUDIO/VIDEO SWIT DUAL 44TQFN
• Manufacturer: Maxim Integrated Products

Specifications of MAX9671CTH+T

• Function: Audio/Video Switch
• Circuit: 2 x SCART
• Voltage Supply Source: Single Supply
• Voltage - Supply, Single/dual (±): 3.3 V ~ 12 V
• Operating Temperature: 0°C ~ 70°C
• Mounting Type: Surface Mount
• Package / Case: 44-TQFN Exposed Pad
• For Use With: MAX9671EVKIT+ - EVALUATION KIT FOR MAX9671
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Low-Power Audio/Video Switch with Audio
Volume Control for Dual SCART Connectors
The acknowledge bit (ACK) is a clocked 9th bit that the
MAX9670/MAX9671 use to handshake receipt of each
byte of data when in write mode (see Figure 8). The
MAX9670/MAX9671 pull down SDA during the entire
master-generated ninth clock pulse if the previous byte
is successfully received. Monitoring ACK allows for
detection of unsuccessful data transfers. An unsuc-
cessful data transfer occurs if a receiving device is
busy or if a system fault has occurred. In the event of
an unsuccessful data transfer, the bus master may retry
communication. The master pulls down SDA during the
ninth clock cycle to acknowledge receipt of data when
Figure 8. Acknowledge
Figure 9. Writing a Byte of Data to the MAX9670/MAX9671
Figure 10. Writing n Bytes of Data to the MAX9670/MAX9671
20
ACKNOWLEDGE FROM MAX9670/MAX9671
SDA
SCL
CONDITION
______________________________________________________________________________________
START
S
S
SLAVE ADDRESS
ACKNOWLEDGE FROM MAX9670/MAX9671
1
SLAVE ADDRESS
2
R/W
ACKNOWLEDGE FROM MAX9670/MAX9671
0
NOT ACKNOWLEDGE
R/W
A
ACKNOWLEDGE
0
ACKNOWLEDGMENT
8
CLOCK PULSE FOR
REGISTER ADDRESS
A
Acknowledge
ACKNOWLEDGE FROM MAX9670/MAX9671
9
REGISTER ADDRESS
A
B7 B6
the MAX9670/MAX9671 are in read mode. An acknowl-
edge is sent by the master after each read byte to allow
data transfer to continue. A not acknowledge is sent
when the master reads the final byte of data from the
MAX9670/MAX9671, followed by a STOP condition.
A write to the MAX9670/MAX9671 consists of transmit-
ting a START condition, the slave address with the R/W
bit set to 0, one data byte to configure the internal reg-
ister address pointer, one or more data bytes, and a
STOP condition. Figure 9 illustrates the proper frame
format for writing one byte of data to the
MAX9670/MAX9671. Figure 10 illustrates the frame for-
mat for writing n bytes of data to the MAX9670/
MAX9671.
The slave address with the R/W bit set to 0 indicates
that the master intends to write data to the MAX9670/
MAX9671. The MAX9670/MAX9671 acknowledge
receipt of the address byte during the master-generat-
ed ninth SCL pulse.
The second byte transmitted from the master config-
ures the MAX9670/MAX9671’s internal register address
pointer. The pointer tells the MAX9670/MAX9671 where
to write the next byte of data. An acknowledge pulse is
sent by the MAX9670/MAX9671 upon receipt of the
address pointer data.
ACKNOWLEDGE FROM
B5 B4
MAX9670/MAX9671
DATA BYTE 1
1 BYTE
REGISTER ADDRESS POINTER
AUTOINCREMENT INTERNAL
B3 B2
A
B1 B0
B7
ACKNOWLEDGE FROM MAX9670/MAX9671
B6
A
B5
DATA BYTE
B4
1 BYTE
B7 B6
B3
ACKNOWLEDGE FROM
B5 B4
B2
MAX9670/MAX9671
DATA BYTE n
1 BYTE
Write Data Format
B1
B3 B2
B0
B1 B0
A
P
A
P