MC10ELT25D ON Semiconductor, MC10ELT25D Datasheet - Page 2
![Translation - Voltage Levels -5V Diff ECL to TTL](/photos/16/3/160315/soic-8_sml.jpg)
MC10ELT25D
Manufacturer Part Number
MC10ELT25D
Description
Translation - Voltage Levels -5V Diff ECL to TTL
Manufacturer
ON Semiconductor
Datasheet
1.MC100ELT25DG.pdf
(8 pages)
Specifications of MC10ELT25D
Logic Type
Translator
Logic Family
ECL
Package / Case
SOIC-8
Translation
ECL to TTL
Propagation Delay Time
4.1 ns
Supply Voltage (max)
- 5.7 V, + 5.5 V
Supply Voltage (min)
- 4.2 V, + 4.5 V
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Lead Free Status / Rohs Status
No RoHS Version Available
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC10ELT25D
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
Part Number:
MC10ELT25DR2
Manufacturer:
ON/安森美
Quantity:
20 000
Company:
Part Number:
MC10ELT25DTG
Manufacturer:
ON Semiconductor
Quantity:
500
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect
device reliability.
2. JEDEC standard multilayer board − 2S2P (2 signal, 2 power)
Table 3. MAXIMUM RATINGS
Symbol
V
V
V
I
T
T
q
q
q
q
q
T
q
BB
A
stg
JA
JC
JA
JC
JA
sol
JC
CC
EE
IN
Figure 1. 8−Lead Pinout (Top View) and Logic
V
V
Positive Power Supply
Negative Power Supply
Input Voltage
V
Operating Temperature Range
Storage Temperature Range
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Thermal Resistance (Junction−to−Case)
Thermal Resistance (Junction−to−Ambient)
Wave Solder
Thermal Resistance (Junction−to−Case)
EE
BB
BB
D
D
Sink/Source
1
2
3
4
Table 2. ATTRIBUTES
1. For additional information, see Application Note AND8003/D.
Internal Input Pulldown Resistor
Internal Input Pullup Resistor
ESD Protection
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1)
Flammability Rating
Transistor Count
Meets or exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
ECL
Diagram
Parameter
TTL
Characteristics
8
7
6
5
V
Q
NC
GND
Pb−Free
CC
Pb
http://onsemi.com
Oxygen Index: 28 to 34
GND = 0 V
GND = 0 V
GND = 0 V
0 lfpm
500 lfpm
Standard Board
0 lfpm
500 lfpm
Standard Board
0 lfpm
500 lfpm
<2 to 3 sec @ 248°C
<2 to 3 sec @ 260°C
(Note 2)
Human Body Model
Condition 1
Machine Model
2
TSSOP−8
Table 1. PIN DESCRIPTION
D, D
Q
V
V
V
GND
NC
EP
SOIC−8
BB
CC
EE
DFN8
Pin
V
V
SOIC−8
SOIC−8
SOIC−8
TSSOP−8
TSSOP−8
TSSOP−8
DFN8
DFN8
DFN8
EE
CC
Condition 2
= −5.0 V
ECL Differential Inputs
TTL Output
Reference Voltage Output
Positive Supply
Negative Supply
Ground
No Connect
(DFN8 only) Thermal exposed pad must be con-
nected to a sufficient thermal conduit. Electric-
ally connect to the most negative supply (GND)
or leave unconnected, floating open.
= +5.0 V
Pb Pkg
Level 1
Level 1
Level 1
UL 94 V−0 @ 0.125 in
38 Devices
> 400 V
> 1 kV
Value
75 kW
N/A
Pb−Free Pkg
Level 1
Level 3
Level 1
Function
41 to 44 ± 5%
−65 to +150
−40 to +85
0 to V
41 to 44
35 to 40
Rating
± 0.5
190
130
185
140
129
265
265
−8
84
7
EE
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Unit
mA
°C
°C
°C
V
V
V