74AHC08PW NXP Semiconductors, 74AHC08PW Datasheet - Page 2
![Gates (AND / NAND / OR / NOR) QUAD 2-INPUT AND GATE](/photos/15/59/155966/soic14_sml.jpg)
74AHC08PW
Manufacturer Part Number
74AHC08PW
Description
Gates (AND / NAND / OR / NOR) QUAD 2-INPUT AND GATE
Manufacturer
NXP Semiconductors
Datasheet
1.74AHCT08D118.pdf
(14 pages)
Specifications of 74AHC08PW
Product
AND
Logic Family
AHC
Number Of Gates
Quad
Number Of Lines (input / Output)
2 / 1
High Level Output Current
- 8 mA
Low Level Output Current
8 mA
Propagation Delay Time
3.5 ns
Supply Voltage (max)
5.5 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
Package / Case
SOT-402
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
Details
Other names
74AHC08PW,112
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
74AHC08PW
Manufacturer:
PHILIPS
Quantity:
11 236
Part Number:
74AHC08PW
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Company:
Part Number:
74AHC08PW,118
Manufacturer:
HIT
Quantity:
5
Part Number:
74AHC08PW-T
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
NXP Semiconductors
4. Functional diagram
5. Pinning information
74AHC_AHCT08_3
Product data sheet
Fig 1. Logic symbol
Fig 4. Pin configuration SO14 and TSSOP14
10
12
13
1
2
4
5
9
1A
1B
2A
2B
3A
3B
4A
4B
GND
1A
1B
1Y
2A
2B
2Y
5.1 Pinning
mna222
1
2
3
4
5
6
7
1Y
3Y
4Y
2Y
11
3
6
8
08
001aac945
14
13
12
11
10
9
8
Fig 2. IEC logic symbol
V
4B
4A
4Y
3B
3A
3Y
CC
Rev. 03 — 14 November 2007
10
13
12
1
2
4
5
9
&
&
&
&
mna223
Fig 5. Pin configuration DHVQFN14
(1) The die substrate is attached to this pad using
11
3
6
8
conductive die attach material. It can not be used as
a supply pin or input.
74AHC08; 74AHCT08
index area
terminal 1
1B
1Y
2A
2B
2Y
Fig 3. Logic diagram (one gate)
A
B
Transparent top view
2
3
4
5
6
GND(1)
08
Quad 2-input AND gate
13
12
11
10
9
001aac946
© NXP B.V. 2007. All rights reserved.
4B
4A
4Y
3B
3A
mna221
2 of 14
Y