74LVC11D NXP Semiconductors, 74LVC11D Datasheet - Page 11

Gates (AND / NAND / OR / NOR) 3.3V TRIPLE 3-INPUT AND GATE

74LVC11D

Manufacturer Part Number
74LVC11D
Description
Gates (AND / NAND / OR / NOR) 3.3V TRIPLE 3-INPUT AND GATE
Manufacturer
NXP Semiconductors
Datasheet

Specifications of 74LVC11D

Product
AND
Logic Family
LVC
Number Of Gates
Triple
Number Of Lines (input / Output)
3 / 1
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Propagation Delay Time
3.7 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.2 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Package / Case
SOT-108
Minimum Operating Temperature
- 40 C
Lead Free Status / Rohs Status
 Details
Other names
74LVC11D,112

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74LVC11D
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
74LVC11D,118
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
74LVC11DB
Manufacturer:
NXP/恩智浦
Quantity:
20 000
Part Number:
74LVC11DT
Manufacturer:
NXP
Quantity:
2 500
Part Number:
74LVC11DT
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
Philips Semiconductors
2004 Jan 13
TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm
Triple 3-input AND gate
DIMENSIONS (mm are the original dimensions)
Notes
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
UNIT
mm
VERSION
OUTLINE
SOT402-1
max.
1.1
A
0.15
0.05
A
1
0.95
0.80
14
A
1
2
y
IEC
Z
0.25
pin 1 index
A
e
3
D
0.30
0.19
b
p
MO-153
JEDEC
0.2
0.1
c
b
p
8
7
REFERENCES
D
5.1
4.9
0
(1)
w
M
E
4.5
4.3
(2)
JEITA
scale
2.5
0.65
11
e
c
A
H
6.6
6.2
2
E
A
1
5 mm
L
1
0.75
0.50
L
H
p
E
E
detail X
0.4
0.3
Q
L
L
PROJECTION
EUROPEAN
p
0.2
v
Q
A
(A )
0.13
3
w
X
Product specification
v
0.1
A
y
M
ISSUE DATE
A
74LVC11
99-12-27
03-02-18
0.72
0.38
Z
(1)
SOT402-1
8
0
o
o

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