74LVCH322245AEC NXP Semiconductors, 74LVCH322245AEC Datasheet - Page 7
74LVCH322245AEC
Manufacturer Part Number
74LVCH322245AEC
Description
Bus Transceivers 32-BIT 5V TOL I/O BUFFER TRAN
Manufacturer
NXP Semiconductors
Datasheet
1.74LVCH322245AEC.pdf
(13 pages)
Specifications of 74LVCH322245AEC
Logic Type
CMOS
Logic Family
LVC
Number Of Channels Per Chip
32
Input Level
LVTTL
Output Level
LVTTL
Output Type
3-State
High Level Output Current
- 12 mA
Low Level Output Current
12 mA
Propagation Delay Time
12 ns
Supply Voltage (max)
3.6 V
Supply Voltage (min)
1.2 V
Maximum Operating Temperature
+ 85 C
Package / Case
SOT-536
Function
Bus Transceiver
Minimum Operating Temperature
- 40 C
Mounting Style
SMD/SMT
Number Of Circuits
4
Polarity
Non-Inverting
Lead Free Status / Rohs Status
Details
Other names
74LVCH322245AEC;55
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
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Quantity:
1 400
Company:
Part Number:
74LVCH322245AEC,51
Manufacturer:
NXP Semiconductors
Quantity:
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Part Number:
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Quantity:
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Company:
Part Number:
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Quantity:
10 000
Company:
Part Number:
74LVCH322245AEC:55
Manufacturer:
NXP Semiconductors
Quantity:
10 000
NXP Semiconductors
10. Dynamic characteristics
Table 7.
Voltages are referenced to GND (ground = 0 V). For test circuit see
[1]
[2]
[3]
[4]
11. Waveforms
74LVCH322245A_3
Product data sheet
Symbol Parameter
T
t
t
t
t
C
pd
en
dis
sk(o)
Fig 4. The input (nAn, nBn) to output (nBn, nAn) propagation delays
amb
PD
Typical values are measured at T
t
t
t
Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
C
P
f
C
V
N = number of inputs switching
pd
en
dis
i
(C
D
CC
= 40 C to +85 C
PD
= input frequency in MHz; f
L
is the same as t
is the same as t
= output load capacitance in pF
is the same as t
= C
L
is used to determine the dynamic power dissipation (P
= supply voltage in Volts
V
V
V
propagation delay
enable time
disable time
output skew time
power dissipation
capacitance
PD
V
M
M
OL
Dynamic characteristics
CC
= 1.5 V at V
= 0.5
and V
2
V
CC
f
o
2
OH
) = sum of the outputs.
V
CC
PLH
PZL
f
are typical output voltage levels that occur with the output load
PLZ
i
CC
at V
and t
N + (C
and t
and t
2.7 V
CC
PZH
PHL
PHZ
o
< 2.7 V
= output frequency in MHz
L
.
.
.
amb
V
Conditions
nAn to nBn; nBn to nAn; see
Figure 4
nOE to nAn, nBn: see
nOE to nAn, nBn; see
per buffer; V
CC
nAn, nBn
nBn, nAn
= 25 C and V
output
2
input
f
o
) where:
GND
V
V
OH
OL
V
I
I
= GND to V
Rev. 03 — 20 August 2007
CC
t
PHL
= 1.2 V, 2.7 V, and 3.3 V respectively.
D
Figure 5
Figure 5
in W).
V
32-bit bus transceiver with direction pin, 30
M
CC
V
M
Figure
V
1.2
2.7
3.0 to 3.6
1.2
2.7
3.0 to 3.6
1.2
2.7
3.0 to 3.6
3.0 to 3.6
3.3
CC
(V)
6.
t
PLH
mna477
74LVCH322245A
[2]
[2]
[2]
[3]
[4]
Min
1.0
1.0
1.5
1.0
1.5
1.5
-
-
-
-
-
Typ
4.2
3.3
5.1
3.4
3.5
3.3
12
18
10
28
-
© NXP B.V. 2007. All rights reserved.
[1]
Max
6.7
5.7
8.5
7.5
7.5
6.5
1.0
-
-
-
-
resistors
Unit
7 of 13
pF
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns