74ABT821D NXP Semiconductors, 74ABT821D Datasheet

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D-type flip-flop; positive-edge trigger; 3-state Rev. 04 — 26 March 2010 1. General description The 74ABT821 high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT821 bus interface register ...

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... NXP Semiconductors 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name −40 °C to +85 °C 74ABT821D −40 °C to +85 °C 74ABT821DB −40 °C to +85 °C 74ABT821PW 4. Functional diagram Fig 1. Logic symbol Fig 3. Logic diagram 74ABT821_4 Product data sheet 10-bit D-type flip-flop; positive-edge trigger; 3-state ...

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... NXP Semiconductors 5. Pinning information 5.1 Pinning Fig 4. Pin configuration 5.2 Pin description Table 2. Pin description Symbol GND 74ABT821_4 Product data sheet 10-bit D-type flip-flop; positive-edge trigger; 3-state 74ABT821 GND Pin 10 23, 22, 21, 20, 19, 18, 17, 16, 15 All information provided in this document is subject to legal disclaimers. ...

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... NXP Semiconductors 6. Functional description 6.1 Function table [1] Table 3. Function table Input OE CP ↑ L ↑ ↑ HIGH voltage level HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition LOW voltage level LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition; ...

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... NXP Semiconductors 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter V supply voltage CC V input voltage I V output voltage O I input clamping current IK I output clamping current OK I output current O T junction temperature j T storage temperature ...

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... NXP Semiconductors 9. Static characteristics Table 6. Static characteristics Symbol Parameter V input clamping voltage IK V HIGH-level output OH voltage V LOW-level output OL voltage V power-up LOW-level OL(pu) output voltage I input leakage current I I power-off leakage OFF current I power-up/power-down O(pu/pd) output current I OFF-state output current output leakage current ...

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... NXP Semiconductors 10. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V; for test circuit, see Figure Symbol Parameter Conditions t LOW to HIGH CP to Qn; see PLH propagation delay t HIGH to LOW CP to Qn; see PHL propagation delay t OFF-state to HIGH OEn to Qn; see PZH propagation delay t OFF-state to LOW OEn to Qn ...

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... NXP Semiconductors Fig 6. Fig 7. 74ABT821_4 Product data sheet 10-bit D-type flip-flop; positive-edge trigger; 3-state input V M GND t PLZ 3.5 V output LOW-to-OFF OFF-to-LOW PHZ V OH output HIGH-to-OFF OFF-to-HIGH GND outputs enabled and V are typical voltage output levels that occur with the output load. ...

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... NXP Semiconductors negative V M pulse positive V M pulse Input pulse definition Test data and V levels are given in EXT R = Load resistance Load capacitance including jig and probe capacitance Termination resistance should be equal to output impedance Test voltage for switching times. EXT Fig 8. Test circuit for measuring switching times Table 8 ...

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... NXP Semiconductors 12. Package outline SO24: plastic small outline package; 24 leads; body width 7 pin 1 index 1 e DIMENSIONS (inch dimensions are derived from the original mm dimensions) A UNIT max. 0.3 2.45 mm 2.65 0.25 0.1 2.25 0.012 0.096 inches 0.1 0.01 0.004 0.089 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. ...

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... NXP Semiconductors SSOP24: plastic shrink small outline package; 24 leads; body width 5 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.21 1. 0.25 0.05 1.65 Note 1. Plastic or metal protrusions of 0.2 mm maximum per side are not included. OUTLINE VERSION IEC SOT340-1 Fig 10. Package outline SOT340-1 (SSOP24) ...

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... NXP Semiconductors TSSOP24: plastic thin shrink small outline package; 24 leads; body width 4 pin 1 index 1 DIMENSIONS (mm are the original dimensions) A UNIT max. 0.15 0.95 mm 1.1 0.25 0.05 0.80 Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. ...

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... Modifications: The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. • Legal texts have been adapted to the new company name where appropriate. • DIP 24 (SOT222-1) package removed from “Package 74ABT821_2 ...

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... In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or ...

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... NXP Semiconductors 16. Contact information For more information, please visit: For sales office addresses, please send an email to: 74ABT821_4 Product data sheet 10-bit D-type flip-flop; positive-edge trigger; 3-state http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 04 — 26 March 2010 74ABT821 © ...

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... NXP Semiconductors 17. Contents 1 General description . . . . . . . . . . . . . . . . . . . . . . 1 2 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 2 4 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 5.1 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 5.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 6 Functional description . . . . . . . . . . . . . . . . . . . 4 6.1 Function table . . . . . . . . . . . . . . . . . . . . . . . . . . 4 7 Limiting values Recommended operating conditions Static characteristics Dynamic characteristics . . . . . . . . . . . . . . . . . . 7 11 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 12 Package outline ...