GAL22V10D-15LP Lattice, GAL22V10D-15LP Datasheet - Page 14

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GAL22V10D-15LP

Manufacturer Part Number
GAL22V10D-15LP
Description
SPLD - Simple Programmable Logic Devices 5V 22 I/O
Manufacturer
Lattice
Datasheet

Specifications of GAL22V10D-15LP

Logic Family
GAL
Number Of Macrocells
10
Maximum Operating Frequency
83.3 MHz
Number Of Programmable I/os
10
Delay Time
15 ns
Operating Supply Voltage
5 V
Supply Current
90 mA
Maximum Operating Temperature
+ 75 C
Minimum Operating Temperature
0 C
Package / Case
PDIP-24
Mounting Style
Through Hole
Supply Voltage (max)
5.25 V
Supply Voltage (min)
4.75 V
Lead Free Status / Rohs Status
No

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Output Load Conditions (except D-4) (see figure below)
3-state levels are measured 0.5V from steady-state active
level.
Switching Test Conditions
Input Pulse Levels
Input Rise and
Fall Times
Input Timing Reference Levels
Output Timing Reference Levels
Output Load
Test Condition
A
B
C
FROM OUTPUT (O/Q)
UNDER TEST
*C
Active High
Active Low
Active High
Active Low
L
INCLUDES TEST FIXTURE AND PROBE CAPACITANCE
D-4/-5/-7
D-10/-15/-20/-25
R
2
300Ω
300Ω
300Ω
R
+5V
1
R
1
390Ω
390Ω
390Ω
390Ω
390Ω
1.5ns 10% – 90%
2.0ns 10% – 90%
R
2
GND to 3.0V
C *
See Figure
L
1.5V
1.5V
TEST POINT
50pF
50pF
50pF
5pF
5pF
C
L
12
GAL22V10D-4 Output Load Conditions (see figure below)
FROM OUTPUT (O/Q)
UNDER TEST
Test Condition
A
B
C
Specifications GAL22V10
Z to Active High at 1.9V
Z to Active Low at 1.0V
Active High to Z at 1.9V
Active Low to Z at 1.0V
TEST POINT
Z
0
= 50Ω, C
50Ω
50Ω
50Ω
50Ω
50Ω
R
1
L
*
50pF
50pF
50pF
50pF
50pF
C
+1.45V
L
R
1

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