MAX4583CSE Maxim Integrated Products, MAX4583CSE Datasheet - Page 9

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MAX4583CSE

Manufacturer Part Number
MAX4583CSE
Description
Analog Switch ICs
Manufacturer
Maxim Integrated Products
Datasheet

Specifications of MAX4583CSE

Switch Configuration
SPDT
On Resistance (max)
450 Ohms at 2.7 V
On Time (max)
300 ns at 3.6 V
Off Time (max)
200 ns at 3.6 V
Supply Voltage (max)
12 V
Supply Voltage (min)
2 V
Maximum Power Dissipation
696 mW
Maximum Operating Temperature
+ 70 C
Package / Case
SOIC-16 Narrow
Minimum Operating Temperature
0 C
Propagation Delay Time
200 ns at +/- 5.5 V, 200 ns at 5.5 V, 300 ns at 3.6 V
Case
SOP16
Dc
99+
Lead Free Status / Rohs Status
No

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will conduct. During normal operation, these and other
reverse-biased ESD diodes leak, forming the only cur-
rent drawn from V
Virtually all the analog leakage current comes from the
ESD diodes. Although the ESD diodes on a given sig-
nal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by
either V
their leakages will vary as the signal varies. The differ-
ence in the two diode leakages to the V
pins constitutes the analog-signal-path leakage current.
All analog leakage current flows between each pin and
one of the supply terminals, not to the other switch ter-
minal. This is why both sides of a given switch can
Table 1. Truth Table/Switch Programming
X = Don’t care
*C not present on MAX4582.
Note: Input and output pins are identical and interchangeable. Either may be considered an input or output; signals pass equally
ENABLE
INPUT
H
L
L
L
L
L
L
L
L
well in either direction.
CC
or V
EE
C*
H
H
H
H
X
L
L
L
L
CC
_______________________________________________________________________________________
and the analog signal. This means
or V
SELECT INPUTS
EE
.
B
H
H
H
H
X
L
L
L
L
A
H
H
H
H
X
L
L
L
L
CC
and V
Low-Voltage, CMOS Analog
All switches open
EE
MAX4581
X–X0
X–X1
X–X2
X–X3
X–X4
X–X5
X–X6
X–X7
show leakage currents of either the same or opposite
polarity.
There is no connection between the analog-signal
paths and GND.
V
translators, and set the input logic limits. The logic-level
translators convert the logic levels into switched V
and V
nals. This drive signal is the only connection between
the logic supplies and signals and the analog supplies.
V
The logic-level thresholds are TTL/CMOS compatible
when V
CC
CC
Multiplexers/Switches
and V
and GND power the internal logic and logic-level
EE
CC
signals to drive the gates of the analog sig-
EE
is +5V. As V
All switches open
ON SWITCHES
have ESD-protection diodes to GND.
MAX4582
X–X0,
X–X1,
X–X2,
X–X3,
X–X0,
X–X1,
X–X2,
X–X3,
Y–Y0
Y–Y1
Y–Y2
Y–Y3
Y–Y0
Y–Y1
Y–Y2
Y–Y3
CC
rises, the threshold increases
All switches open
MAX4583
X–X0,
Y–Y0,
X–X1,
Y–Y0,
X–X0,
Y–Y1,
X–X1,
Y–Y1,
X–X0,
Y–Y0,
X–X1,
Y–Y0,
X–X0,
Y–Y1,
X–X1,
Y–Y1,
Z–Z0
Z–Z0
Z–Z0
Z–Z0
Z–Z1
Z–Z1
Z–Z1
Z–Z1
CC
9

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