ATR2406-PNQG Atmel, ATR2406-PNQG Datasheet - Page 15

• Manufacturer Part Number: ATR2406-PNQG
• Manufacturer: Atmel

Specifications of ATR2406-PNQG

• Operating Temperature Classification: Commercial
• Operating Supply Voltage (typ): 3.3V
• Operating Supply Voltage (max): 3.6V
• Lead Free Status / Rohs Status: Compliant

7.10
4779K–ISM–06/06
Received Signal Strength Indication RSSI
Table 7-9.
The RSSI is given as an analog voltage at the RSSI pin. A typical plot of the RSSI value is
shown in
Figure 7-4.
Conditiion
C1
C2
C3
C4
C5
Figure
Description of the Conditions/States
Typical RSSI Value versus Input Power
7-4.
2.0
0.0
2.5
0.5
1.0
1.5
Description
Power-down
ATR2406 is switched off and the supply current is lower than 1 µA.
Power-up
ATR2406 is powered up by toggling PU_REG and PU_TRX to high.
PU_REG enables the external AUX Regulator transistor including VCO
Regulator PU_TRX enables internal blocks like the PLL and the VCO.
Depending on the value of the external capacitors (i.e. at the AUX-Regulator, if
one is used), it is necessary to wait at least 40 µs until the different supply
voltages have settled.
Programming
Via the tree-wire-interface the internal register of ATR2406 is programmed. At
TX, this is just the PLL (transmit channel) and the deviation (gaussian filter).
At RX, this is just the PLL (receive channel) and if the clock recovery is used
also the bits to enable this option. At start of the three-wire-programming, the
enable signal is toggled from high to low to enable clocking the data into the
internal register. When the enable signals rises again to high, the programmed
data is latched. This is the time point at which the settling of the PLL is starting.
It is necessary to wait the settling time of 200 µs so that the VCO-Frequency is
stable.
The reference clock needs to be applied to ATR2406 at minimum the time when
the PLL is in operation - which is the programming state (C3) and the active slot
(C4, C5). Out of the reference clock, several internal signals are also derived,
i.e., the gaussian filter circuitry and TX_DATA sampling.
This is the receive slot where the transmit burst is received and data as well as
recovered clock are available.
This is the active transmit slot. As soon as TX_DATA is applied to ATR2406, the
signal nOLE toggles to low which enables modulation in open-loop-mode.
Please start sending a Preamble (1-0-1-0 Pattern) at start of TX_ON.
-130
-110
-90
RF Level (dBm)
-70
-50
-30
-10
10
ATR2406
15