ATA5812-PLQW Atmel, ATA5812-PLQW Datasheet - Page 59
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ATA5812-PLQW
Manufacturer Part Number
ATA5812-PLQW
Description
Manufacturer
Atmel
Datasheet
1.ATA5812-PLQW.pdf
(92 pages)
Specifications of ATA5812-PLQW
Operating Temperature (min)
-40C
Operating Temperature (max)
105C
Operating Temperature Classification
Industrial
Product Depth (mm)
7mm
Product Height (mm)
0.9mm
Product Length (mm)
7mm
Lead Free Status / Rohs Status
Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATA5812-PLQW
Manufacturer:
ATMEL
Quantity:
962
11.2
4689F–RKE–08/06
TX Operation
The transceiver is set to TX operation by using the bits OPM0 and OPM1 in the control
register 1.
Table 11-4.
Before activating TX mode, the TX parameters (bit rate, modulation scheme ... ) must be
selected as illustrated in
control register 6, Lim_min0 to Lim_min5 in control register 5 and XLIM in control register 4 (see
section
register 4. The FSK frequency deviation is fixed to about ±16 kHz. If P_Mode is set to 1, the
Manchester modulator is disabled and pattern mode is active (NRZ, see
62).
After the transceiver is set to TX mode the start-up mode is active and the PLL is enabled. If the
PLL is locked, the TX mode is active.
If the transceiver is in start-up or TX mode, the TX/RX data buffer can be loaded via the 4-wire
serial interface. After the first byte is in the buffer and the TX mode is active, the transceiver
starts transmitting automatically (beginning with the MSB). While transmitting it is permanently
possible to load new data in the TX/RX data buffer. To prevent a buffer overflow or interruptions
during transmitting the user must ensure that data is loaded at the same speed as it is
transmitted.
There is a counter that indicates the number of bytes to be transmitted (see section
Configuration” on page
ted, the counter is decremented. The counter value is available via the 4-wire serial interface. An
IRQ is issued, if the counter while counting backwards reaches the value defined by the control
bits IR0 and IR1 in control register 1.
Note:
If T_Mode in control register 1 is set to 1, the transceiver is in TX transparent mode. In this mode
the TX/RX data buffer is disabled and the TX data stream must be applied on pin SDI_TMDI.
Figure 11-11 on page 60
“Control Register” on page
Writing to the control register 1, 4, 5 or 6 during TX mode, resets the TX/RX data buffer and the
counter which indicates the number of bytes to be transmitted.
OPM1
Control Register 1
0
46). If a byte is loaded, the counter is incremented, if a byte is transmit-
Figure 11-11 on page
illustrates the flow chart of the TX transparent mode.
35). The modulation is selected with ASK_/NFSK in control
OPM0
60. The bit rate depends on Baud0 and Baud1 in
1
ATA5811/ATA5812
Table 11-5 on page
Function
TX mode
“Transceiver
59