MICRF506BML Micrel Inc, MICRF506BML Datasheet

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MICRF506BML

Manufacturer Part Number
MICRF506BML
Description
Manufacturer
Micrel Inc
Datasheet

Specifications of MICRF506BML

Operating Frequency (max)
450000kHz
Operating Temperature (min)
-40C
Operating Temperature (max)
85C
Operating Temperature Classification
Industrial
Modulation Type
FSK
Lead Free Status / Rohs Status
Not Compliant

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MICRF506BML
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General Description
The MICRF506 is a true single-chip, frequency shift keying
(FSK) transceiver intended for use in half-duplex,
bidirectional RF links. The multi-channeled FSK transceiver
is intended for UHF radio equipment in compliance with the
European Telecommunication Standard Institute (ETSI)
specification, EN300 220.
The transmitter consists of a PLL frequency synthesizer
and power amplifier. The frequency synthesizer consists of
a voltage-controlled oscillator (VCO), a crystal oscillator,
dual modulus prescaler, programmable frequency dividers,
and a phase-detector. The loop-filter is external for flexibility
and can be a simple passive circuit. The output power of
the power amplifier can be programmed to seven levels. A
lock-detect circuit detects when the PLL is in lock. In
receive mode, the PLL synthesizer generates the local
oscillator (LO) signal. The N, M, and A values that give the
LO frequency are stored in the N0, M0, and A0 registers.
The receiver is a zero intermediate frequency (IF) type
which makes channel filtering possible with low-power,
integrated low-pass filters. The receiver consists of a low
noise amplifier (LNA) that drives a quadrature mix pair. The
mixer outputs feed two identical signal channels in phase
quadrature. Each channel includes a pre-amplifier, a third
order Sallen-Key RC low-pass filter that protects the
following switched-capacitor filter from strong adjacent
channel signals, and a limiter. The main channel filter is a
switched-capacitor implementation of a six-pole elliptic low
pass filter. The cut-off frequency of the Sallen-Key RC filter
can be programmed to four different frequencies: 100kHz,
150kHz, 230kHz, and 340kHz. The I and Q channel
outputs are demodulated and produce a digital data output.
The demodulator detects the relative phase of the I and the
Q channel signal. If the I channel signal lags behind the Q
channel, the FSK tone frequency is above the LO
frequency (data '1'). If the I channel leads the Q channel,
the FSK tone is below the LO frequency (data '0'). The
output of the receiver is available on the DataIXO pin. A
receive signal strength indicator (RSSI) circuit indicates the
received signal level. All support documentation can be
found on Micrel’s web site at www.micrel.com.
July 2006
1
Features
• True single chip transceiver
• Digital bit synchronizer
• Received signal strength indicator (RSSI)
• RX and TX power management
• Power down function
• Reference crystal tuning capabilities
• Frequency error estimator
• Baseband shaping
• Three-wire programmable serial interface
• Register read back function
Applications
• Telemetry
• Remote metering
• Wireless controller
• Remote data repeater
• Remote control systems
• Wireless modem
• Wireless security system
410MHz and 450MHz ISM Band
MICRF506
Transceiver
RadioWire®
+1 408-944-0800
M9999-092904

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MICRF506BML Summary of contents

Page 1

General Description The MICRF506 is a true single-chip, frequency shift keying (FSK) transceiver intended for use in half-duplex, bidirectional RF links. The multi-channeled FSK transceiver is intended for UHF radio equipment in compliance with the European Telecommunication Standard Institute (ETSI) ...

Page 2

General Description ....................................................................................................................................................1 Features......................................................................................................................................................................1 Applications ................................................................................................................................................................1 RadioWire® RF Selection Guide ................................................................................................................................4 Ordering Information...................................................................................................................................................4 Block Diagram ............................................................................................................................................................4 Pin Configuration ........................................................................................................................................................5 Pin Description............................................................................................................................................................5 (1) Absolute Maximum Ratings .....................................................................................................................................6 (2) Operating Ratings ....................................................................................................................................................6 (4) Electrical Characteristics .........................................................................................................................................6 Programming ..............................................................................................................................................................9 Writing to the control ...

Page 3

... MICRF506BML/YML Land pattern ...........................................................................................................................31 Layout Considerations ..............................................................................................................................................32 Package Information MICRF506BML.......................................................................................................................33 Package Information MICRF506YML.......................................................................................................................34 Overview of programming bit....................................................................................................................................35 Table 1: Detailed description of programming bit.....................................................................................................35 Table 2: Main Mode bit .............................................................................................................................................40 Table 3: Synchronizer mode bit................................................................................................................................40 Table 4: Modulation bit .............................................................................................................................................40 Table 5: Prefilter bit...................................................................................................................................................40 Table 6: Power amplifier bit ......................................................................................................................................41 Table 7:Generation of Bitrate_clk, BitSync_clk and Mod_clk...................................................................................41 Table 8: Test signals ...

Page 4

... Frequency Range MICRF500 700MHz – 1.1GHz MICRF501 300MHz – 440MHz MICRF505 850MHz – 950MHz MICRF506 410MHz – 450MHz MICRF405 290-980MHz Ordering Information Part Number MICRF506YML TR MICRF506BML TR ____________________________________________________________________________________________________ Block Diagram ANT LC Filter LO-Buffer CIBIAS PTATBIAS Bias July 2006 Maximum Supply Data Rate Receive ...

Page 5

... RFGND 5 20 ANT 6 19 RFGND GND MICRF506BML TM 32-Pin MLF Pin Function LNA and PA ground. Connection for bias resistor. LNA and PA power supply. LNA and PA ground. Antenna In/Output. LNA and PA ground. LNA and PA ground. No connect. Connection for bias resistor. IF/mixer power supply ...

Page 6

... Over temperature range Over power supply range R = 50Ω, Pa2-0-111 LOAD R = 50Ω, Pa2-0-001 LOAD R = 50Ω, Pa2-0-000 LOAD Birate = 200kbps VCO modulation Divider modulation 6 MICRF506BML/YML (2) ) ............................+2.0V to +2. ................ –40°C to +85° (θ ) ........................................... 41.7°C 2.5V 25°C, bold DD A Min Typ ...

Page 7

... Offset ±1MHz Desired signal: Offset ±2MHz 19.2 kbps, β =6, Offset ±5MHz 3dB above sens, SC=133 kHz Offset ±10MHz Offset ±30MHz 2 tones with 1MHz separation <1GHz, EN 300 220 >1GHz, EN 300 220 7 MICRF506BML/YML Min Typ Max Units 140 kHz 550 kHz 800 kHz dBm -36 ...

Page 8

... The device is not guaranteed to function outside its operating rating. 3. Devices are ESD sensitive. Handling precautions recommended. Human body model, 1.5k in series with 100pF. 4. Specification for packaged product only. 5. Guaranteed by design. July 2006 Condition Pin = -110dBm Pin = -60dBm 8 MICRF506BML/YML Min Typ Max Units 50 0.9 2 0.7V ...

Page 9

Programming General The MICRF506 functions are enabled through a number of programming bits. The programming bits are organized as a set of addressable control registers, each register holding 8 bits. There are 23 control registers in total in the MICRF506, ...

Page 10

Writing to the control registers in MICRF506 Writing: A number of octets are entered into MICRF506 followed by a load-signal to activate the new setting. Making these events is referred “write sequence.” possible to update ...

Page 11

Writing to All Registers After a power-on, all writable registers should be written. This is described here. Writing to all register can be done at any time. To get the simplest firmware, always write to all registers. The price to ...

Page 12

... Make the IO line an output from the user again. Programming interface timing Figure 4 and Table 6 shows the timing specification for the 3-wire serial programming interface. Tcsr traise SCLK Address Register 12 MICRF506BML/YML RWData read from reg. i Figure 3. Tper Thigh Tread Twrite tfall Tlow ...

Page 13

Symbol Parameter Min. Tper Min. period of 50 SCLK Thigh Min. high time of 20 SCLK Tlow Min. low time of 20 SCLK tfall Max. time of falling edge of SCLK trise Max. time of rising edge of SCLK Tcsr ...

Page 14

Programming summary • Use CS, SCLK, and IO to get access to the control registers in MICRF506. • SCLK is user-controlled. • Write to the MICRF506 at positive edges (MICRF506 reads at negative edges). • Read from the MICRF506 at ...

Page 15

Frequency Synthesizer The MICRF506 frequency synthesizer consists of a voltage-controlled oscillator (VCO), a crystal oscillator, dual modulus prescaler, programmable frequency dividers and a phase-detector. The loop-filter is external for flexibility and can be a simple passive circuit. The phase detector ...

Page 16

The lengths of the N, M, and A registers are 12, 12 and 6 respectively The values can be calculated from the following formula XCO VCO = = PhD × ...

Page 17

XCOtune Start-up Time (µ Table 7. Typical values with external reference is used instead of a crystal, the signal shall be applied to pin 24, XTALOUT. Due to internal DC ...

Page 18

Charge Pump A6.. 0000010 CP_HI SC_by ‘0’ PA_by OUTS3 The charge pump current can be set to either 125µA or 500µA by CP_HI (‘1’ → 500µA). This will affect the loop filter component values, see ...

Page 19

Transceiver Sync/Non-Synchronous Mode A6.. 0000000 LNA_by PA2 0000110 - Mod_clkS2 0000111 BitRate_clkS1 BitRate_clkS0 Sync_en State Comments Rx: Bit Transparent reception of 0 synchronization off data Transparent transmission 0 Tx: DataClk pin off of data Rx: Bit Bit-clock is ...

Page 20

Receiver The receiver is a zero intermediate frequency (IF) type in order to make channel filtering possible with low-power integrated low-pass filters. The receiver consists of a low noise amplifier (LNA) that drives a quadrature mixer pair. The mixer outputs ...

Page 21

Switched Capacitor Filter A6.. 0001000 ‘1’ ScClk_X2 ‘0’ ScClk4 ScClk3 The main channel filter is a switched-capacitor implementation of a six-pole elliptic low pass filter. The elliptic filter minimized the total capacitance required for a ...

Page 22

FEE A6.. 0010101 - - - - 0010110 FEE_7 FEE_6 FEE_5 FEE_4 The Frequency Error Estimator information from the demodulator to calculate the frequency offset between it’s receive frequency and the transmitter frequency. The output of ...

Page 23

Bit Synchronizer A6.. 0000110 - ModclkS2 0000111 BitRate_clkS1 BitRate_clkS0 A bit synchronizer can be enabled in receive mode by selecting the synchronous mode (Sync_en=1). The DataClk pin will output a clock with twice the frequency of the bit ...

Page 24

Transmitter Power Amplifier A6..A0 D7 0000000 LNA_by 0000001 Modulation1 0000010 CP_HI The maximum output power is approximately 10dBm for a 50Ω load. For maximum output power the load seen by the PA must be resistive. Higher output power can be ...

Page 25

Table 12. Manchester Encoding Another much more efficient encoding type is 3B4B where three data bits are encoded into a four-bit word. The reason for encoding is to minimize the DC component in the modulated data. To have minimum DC ...

Page 26

Modulator A6.. 0000100 Mod_F2 Mod_F1 0000101 - - 0000110 - Mod_clkS2 0000111 BitRate_clkS1 BitRate_clkS0 The modulator will create programmable amplitude and waveform is fed into a modulation varactor in the VCO, which will create the desired frequency modulation. ...

Page 27

Mod_la Mod_lb Mod_la > Mod_lb Figure 21. Two Different Modulator Current Settings Modulator Attenuator A third way to set the deviation is by programming the modulator attenuator, Mod_A2..Mod_A0, the last being LSB. The purpose of the attenuator is to allow ...

Page 28

The modulator filter will not influence on the frequency deviation as long as the programmed cut- off frequency is above the actual bit rate. The frequency deviation must be programmed so that the modulation index (2 x single sided frequency ...

Page 29

To avoid this situation, always make sure max count is between limits. Suggestion: Count for 8 (or 16) bits only. Procedure description: In the procedure below, UP+DWN pulses are counted, and only the sign of the FEE is used. The ...

Page 30

Typical Application L1 50ohm line ANT C6 12nH 15pF RFVDD Item Part C10 11 C11 12 C12 13 C13 14 R1 ...

Page 31

... MICRF506BML/YML Land pattern Figure below shows recommended land pattern. Red circles indicate Thermal/RFGND via’s. Recommended size is 0.300-0.350mm with a pitch of 1mm. The recommended minimum number of via’s are 9 and they should be directly connected to ground plane providing the best RF ground and thermal performance. For best yield plugged or open via’ ...

Page 32

Layout Considerations The MICRF506 is a highly integrated RF IC with only a few “hot” pins, however it is suggested to study available reference design on www.micrel.com • To ensure the best RF design it is important to plan the ...

Page 33

... Package Information MICRF506BML July 2006 MICRF505BML 32-Pin MLF (B) 33 M9999-092904 +1 408-944-0800 ...

Page 34

Package Information MICRF506YML Side view Bottom view 5.0 3.10±0.10 5.0 July 2006 3.10±0.10 0.5 0.25 0.4±0. Top view C H ...

Page 35

Overview of programming bit Address A6.. 0000000 LNA_by PA2 0000001 Modulation1 Modulation0 0000010 CP_HI SC_by IFBias_s IFA_HG 0000011 (“1”) (“1”) 0000100 Mod_F2 Mod_F1 0000101 - - 0000110 - Mod_clkS2 0000111 BitRate_clkS1 BitRate_clkS0 SC_HI ScClk_X2 0001000 (“1”) (“1”) PrescalMode_s ...

Page 36

LD_en 1 PF_FC1 0 PF_FC0 0000010 7 CP_HI 6 SC_by 5 VCO_by 4 PA_by 3 OUTS3 2 OUTS2 1 OUTS1 0 OUTS0 0000011 7 IFBias_s 6 IFA_HG 5 VCO_Bias_s 4 VCO_IB2 3 VCO_IB1 2 VCO_IB0 1 VCO_freq1 0 VCO_freq0 ...

Page 37

ScClk4 3 ScClk3 2 ScClk2 1 ScClk1 0 ScClk0 0001001 7 PrescalMode_s 6 Prescal_s 5 XCOAR_en 4 XCOtune4 3 XCOtune3 2 XCOtune2 1 XCOtune1 0 XCOtune0 0001010 7 --------- 6 --------- 5 A0_5 4 A0_4 3 A0_3 2 A0_2 ...

Page 38

A1_5 4 A1_4 3 A1_3 2 A1_2 1 A1_1 0 A1_0 0010000 7 --------- 6 --------- 5 --------- 4 --------- 3 N1_11 2 N1_10 1 N1_9 0 N1_8 0010001 7 N1_7 6 N1_6 5 N1_5 4 N1_4 ...

Page 39

FEE_7 6 FEE_6 5 FEE_5 4 FEE_4 3 FEE_3 2 FEE_2 1 FEE_1 0 FEE_0 July 2006 FEE value, bit 7, MSB FEE value, bit 6 FEE value, bit 5 FEE value, bit 4 FEE value, bit 3 ...

Page 40

Table 2: Main Mode bit Mode1 Mode0 State 0 0 Power down 0 1 Standby 1 0 Receive 1 1 Transmit Table 3: Synchronizer mode bit Sync_en State 0 Rx: Bit synchronization off 0 Tx: DataClk pin off 1 Rx: ...

Page 41

Table 6: Power amplifier bit PA2 PA1 PA0 PALDc_en turned off by PA2=PA1=PA0=0 ...

Page 42

Table 9: PAbuffer bias current setting PA_IB2 PA_IB1 PA_IB0 Table 10: Frequency Error Estimation control bit ...

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