UPC8195K-E1 CALIFORNIA EASTERN LABS, UPC8195K-E1 Datasheet - Page 4

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UPC8195K-E1

Manufacturer Part Number
UPC8195K-E1
Description
Manufacturer
CALIFORNIA EASTERN LABS
Datasheet

Specifications of UPC8195K-E1

Pin Count
20
Screening Level
Commercial
Package Type
QFN
Lead Free Status / Rohs Status
Not Compliant
PIN FUNCTIONS
No.
Pin
1
2
3
4
5
6
7
8
9
(Shifter)
(Shifter)
Name
GND
N.C.
LOb
V
V
Pin
Qb
LO
Q
CC
PS
2.7 to 3.3
Applied
Voltage
0 to 3.0
V
V
(V)
CC
CC
0
0
0
0
/2
/2
(Pin Voltage is measured at V
Voltage
2.02
2.02
Pin
(V)
-
-
-
-
-
-
Q signal input pin.
Apply bias voltage externally.
Maximum balance input voltage is
1 000 mV
Ground pin of I/Q modulator.
This pin should be grounded with
minimum inductance.
Form the ground pattern as widely as
possible to minimize ground impedance.
No connection
This pin is not connected to internal circuit
This pin should be opened or grounded.
Bypass pin of local signal input for I/Q
modulator.
In the case of single local input,
this pin must be decoupled with capacitor
ex. 1 000 pF.
Local signal input of I/Q modulator.
The DC cut capacitor ex. 1 000 pF
must be attaced to this pin.
Supply voltage pin of I/Q modulator.
Power saving pin of I/Q modulator +
AGC amplifier.
This pin modulator can control
Active/Sleep state with bias as follows.
V
0 to 0.5
2.2 to 3
PS
Functions and Applications
p-p
(V)
(balance).
CC
= 2.85 V)
Active Mode
Sleep Mode
State
1
Internal Equivalent Circuits
9
50 kΩ
2

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