W255H Cypress Semiconductor Corp, W255H Datasheet
W255H
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W255H Summary of contents
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... SMBus Decoding SCLOCK Power Down Control R_DWN# SEL_DDR Cypress Semiconductor Corporation Document #: 38-07255 Rev. *C 200-MHz 24-Output Buffer for 4 DDR Functional Description The W255 is a 3.3V/2.5V buffer designed to distribute high-speed clocks in PC applications. The part has 24 outputs. Designers can configure these outputs to support four unbuf- fered DDR DIMMS or to support three unbuffered standard SDRAM DIMMs and two DDR DIMMS ...
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Pin Summary Pin Name Pins SEL_DDR 48 SCLK 25 SDATA 24 BUF_IN 13 FBOUT 1 PWR_DWN# 36 DDR[6:11]T 28, 30, 34, 39, 43, 45 DDR[6:11]C 27, 29, 33, 38, 42, 44 DDR[0:5]T_SDRAM 4, 6, 10, 15, 19, 21 [10,0,2,4,6,8] DDR[0:5]C_SDRAM ...
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Serial Configuration Map • The serial bits will be read by the clock driver in the following order: Byte 0 - Bits Byte 1 - Bits ...
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Maximum Ratings Supply Voltage to Ground Potential ..................–0.5 to +7.0V DC Input Voltage (except BUF_IN) ............ –0. [2] Operating Conditions Parameter VDD3.3 Supply Voltage VDD2.5 Supply Voltage T Operating Temperature (Ambient Temperature Output Capacitance OUT C ...
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Switching Characteristics (continued) Parameter Name t DDR Falling Edge Rate 4d t Output to Output Skew for DDR 5 t Output to Output Skew for 6 [3] SDRAM t SDRAM Buffer LH Prop. Delay 7 t SDRAM Buffer HL Prop. ...
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... Figure 1 shows the differential clock directly terminated by a 120 resistor Device Out Under Test Out Figure 1. Differential Signal Using Direct Termination Resistor Ordering Information Ordering Code W255H W255HT Document #: 38-07255 Rev 60W ) 60W Package Type 48-pin SSOP 48-pin SSOP–Tape and Reel Option W255 VTR R ...
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Layout Example for DDR 2.5V Only Dale ILB1206 - 300 (300 @ 100 MHz) or TDK ACB 2012L-120 Ceramic Caps C3 = 10– VIA to GND plane layer Note: Each ...
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Layout Example SDRAM (Mixed Voltage Dale ILB1206 - 300 (300 @ 100 MHz) or TDK ACB 2012L-120 Ceramic Caps C1 and C3 = 10– VIA to GND plane layer Note: Each ...
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... Document #: 38-07255 Rev. *C © Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product. Nor does it convey or imply any license under patent or other rights. Cypress Semiconductor does not authorize its products for use as critical components in life-support systems where a malfunction or failure may reasonably be expected to result in significant injury to the user ...
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Document Title: W255 200MHz 24 Output Buffer for 4 DDR or 3 SDRAM DIMMs Document Number: 38-07255 Issue REV. ECN NO. Date ** 110520 12/04/01 *A 112154 03/01/02 *B 114554 05/07/02 *C 122857 12/14/02 Document #: 38-07255 Rev. *C Orig. ...