AT49LV001N-70TI Atmel, AT49LV001N-70TI Datasheet - Page 5

• Manufacturer Part Number: AT49LV001N-70TI
• Manufacturer: Atmel

Specifications of AT49LV001N-70TI

• Cell Type: NOR
• Density: 1Mb
• Access Time (max): 70ns
• Interface Type: Parallel
• Boot Type: Bottom
• Address Bus: 17b
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: -40C to 85C
• Package Type: TSOP-I
• Program/erase Volt (typ): 3 to 3.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Industrial
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8b
• Number Of Words: 128K
• Supply Current: 25mA
• Mounting: Surface Mount
• Pin Count: 32
• Lead Free Status / Rohs Status: Not Compliant

AT49BV/LV001(N)(T)
BOOT BLOCK PROGRAMMING LOCKOUT OVERRIDE: The user can override the boot
block programming lockout by taking the RESET pin to 12 volts during the entire chip erase,
sector erase or byte programming operation. When the RESET pin is brought back to TTL lev-
els the boot block programming lockout feature is again active. This feature is not available on
the AT49BV/LV001N(T).
PRODUCT IDENTIFICATION: The product identification mode identifies the device and man-
ufacturer as Atmel. It may be accessed by hardware or software operation. The hardware
operation mode can be used by an external programmer to identify the correct programming
algorithm for the Atmel product.
For details, see Operating Modes (for hardware operation) or Software Product Identification.
The manufacturer and device code is the same for both modes.
DATA POLLING: The AT49BV/LV001(N)(T) features DATA polling to indicate the end of a
program cycle. During a program cycle an attempted read of the last byte loaded will result in
the complement of the loaded data on I/O7. Once the program cycle has been completed, true
data is valid on all outputs and the next cycle may begin. DATA polling may begin at any time
during the program cycle.
TOGGLE BIT: In addition to DATA polling the AT49BV/LV001(N)(T) provides another method
for determining the end of a program or erase cycle. During a program or erase operation,
successive attempts to read data from the device will result in I/O6 toggling between one and
zero. Once the program cycle has completed, I/O6 will stop toggling and valid data will be
read. Examining the toggle bit may begin at any time during a program cycle.
HARDWARE DATA PROTECTION: Hardware features protect against inadvertent programs
to the AT49BV/LV001(N)(T) in the following ways: (a) V
sense: if V
is below 1.8V (typical),
CC
CC
the program function is inhibited. (b) Program inhibit: holding any one of OE low, CE high or
WE high inhibits program cycles. (c) Noise filter: pulses of less than 15 ns (typical) on the WE
or CE inputs will not initiate a program cycle.
5
1110C–FLASH–9/03