CY62148BLL-70SXI Cypress Semiconductor Corp, CY62148BLL-70SXI Datasheet - Page 4

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CY62148BLL-70SXI

Manufacturer Part Number
CY62148BLL-70SXI
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY62148BLL-70SXI

Density
4Mb
Access Time (max)
70ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
5V
Address Bus
19b
Package Type
SOIC
Operating Temp Range
-40C to 85C
Number Of Ports
1
Supply Current
20mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Word Size
8b
Number Of Words
512K
Lead Free Status / Rohs Status
Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY62148BLL-70SXI
Manufacturer:
CY
Quantity:
106
Document #: 38-05039 Rev. *C
Switching Characteristics
READ CYCLE
t
t
t
t
t
t
t
t
t
t
t
WRITE CYCLE
t
t
t
t
t
t
t
t
t
t
Notes:
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
WC
SCE
AW
HA
SA
PWE
SD
HD
LZWE
HZWE
5. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified
6. At any given temperature and voltage condition, t
7. t
8. The internal write time of the memory is defined by the overlap of CE LOW, and WE LOW. CE and WE must be LOW to initiate a write, and the transition of any of these
I
signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the write.
OL
HZOE
/I
Parameter
OH
, t
and 100-pF load capacitance.
HZCE
, and t
[8]
HZWE
are specified with a load capacitance of 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low Z
OE HIGH to High Z
CE LOW to Low Z
CE HIGH to High Z
CE LOW to Power-Up
CE HIGH to Power-Down
Write Cycle Time
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
WE Pulse Width
Data Set-Up to Write End
Data Hold from Write End
WE HIGH to Low Z
WE LOW to High Z
[5]
Over the Operating Range
HZCE
[6]
[6]
[6, 7]
[6]
[6, 7]
[6, 7]
Description
is less than t
LZCE
, t
HZOE
is less than t
LZOE
, and t
HZWE
is less than t
Min.
70
10
10
70
60
60
55
30
5
0
0
0
0
5
62148BLL-70
LZWE
CY62148B MoBL™
for any given device.
Max.
70
70
35
25
25
70
25
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Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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