MC68HC711K4CFN3 Freescale Semiconductor, MC68HC711K4CFN3 Datasheet - Page 23
MC68HC711K4CFN3
Manufacturer Part Number
MC68HC711K4CFN3
Description
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68HC711K4CFN3.pdf
(290 pages)
Specifications of MC68HC711K4CFN3
Cpu Family
HC11
Device Core Size
8b
Frequency (max)
4MHz
Interface Type
SCI/SPI
Program Memory Type
ROM
Program Memory Size
24KB
Total Internal Ram Size
768Byte
Number Of Timers - General Purpose
8
Operating Supply Voltage (typ)
5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
4.5V
On-chip Adc
8-chx8-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
84
Package Type
PLCC
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC68HC711K4CFN3
Manufacturer:
MOLEX
Quantity:
12 000
Part Number:
MC68HC711K4CFN3
Manufacturer:
MOTOROLA/摩托罗拉
Quantity:
20 000
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M68HC11K Family
MOTOROLA
Technical Data — M68HC11K Family
Table
1-1
2-1
2-2
3-1
4-1
4-2
4-3
4-4
4-5
4-6
4-7
4-8
4-9
4-10 XOUT Frequencies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .103
5-1
5-2
5-3
5-4
5-5
5-6
5-7
6-1
Freescale Semiconductor, Inc.
For More Information On This Product,
M68HC11K Family Devices . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
I/O Ports and Peripheral Functions. . . . . . . . . . . . . . . . . . . . . . 42
Port Signal Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Instruction Set. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56
Registers with Limited Write Access. . . . . . . . . . . . . . . . . . . . . 76
Synchronization Character Selection . . . . . . . . . . . . . . . . . . . . 79
Hardware Mode Select Summary. . . . . . . . . . . . . . . . . . . . . . . 80
Default Memory Map Addresses . . . . . . . . . . . . . . . . . . . . . . . 83
RAM Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .85
Register Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86
EEPROM Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Scope of EEPROM Erase. . . . . . . . . . . . . . . . . . . . . . . . . . . . .95
EEPROM Block Protect . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97
Reset Vectors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .106
COP Timeout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .109
IRVNE Operation After Reset . . . . . . . . . . . . . . . . . . . . . . . . . 113
XOUT Clock Divide Select . . . . . . . . . . . . . . . . . . . . . . . . . . . 114
Interrupt and Reset Vector Assignments . . . . . . . . . . . . . . . . 118
Stacking Order on Entry to Interrupts . . . . . . . . . . . . . . . . . . .119
Highest Priority Interrupt Selection . . . . . . . . . . . . . . . . . . . . . 124
Port Configuration. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136
Go to: www.freescale.com
List of Tables
Title
List of Tables
Technical Data
Page
23
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