LP2996LQX National Semiconductor, LP2996LQX Datasheet - Page 12

LP2996LQX

Manufacturer Part Number
LP2996LQX
Description
Manufacturer
National Semiconductor
Datasheet

Specifications of LP2996LQX

Voltage Regulator Type
Linear
Topology
LDO
Regulator Output Type
Fixed
Polarity Type
Positive
Number Of Outputs
Single
Input Voltage (min)
2.2V
Input Voltage (max)
5.5V
Output Voltage
1.159/1.259/1.359V
Package Type
LLP EP
Output Current
1.5A
Operating Temp Range
0C to 125C
Operating Temperature Classification
Commercial
Pin Count
16
Mounting
Surface Mount
Quiescent Current (max)
500uA
Dc
0352
Lead Free Status / Rohs Status
Not Compliant

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DDR-II APPLICATIONS
With the separate VDDQ pin and an internal resistor divider
it is possible to use the LP2996 in applications utilizing DDR-
II memory.
tions of recommended circuits with output curves displayed
in the Typical Performance Characteristics.
If it is not desirable to use the 1.8V rail it is possible to connect
the output stage to a 3.3V rail. Care should be taken to not
exceed the maximum junction temperature as the thermal
dissipation increases with lower V
Figure 6
and
Figure 7
FIGURE 7. SSTL-2 Implementation with higher voltage rails
TT
show several implementa-
FIGURE 9. DDR-II Termination with higher voltage rails
output voltages. For this
FIGURE 8. Recommended DDR-II Termination
Figure 6
shows
12
the recommended circuit configuration for DDR-II applica-
tions. The output stage is connected to the 1.8V rail and the
AVIN pin can be connected to either a 3.3V or 5V rail. For new
designs, the LP2997 or LP2998 is recommended for DDR-II
applications.
reason it is not recommended to power PVIN off a rail higher
than the nominal 3.3V. The advantage of this configuration is
that it has the ability to source and sink a higher maximum
continuous current.
20057512
20057514
20057513

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