CY62128VLL-70ZAIT Cypress Semiconductor Corp, CY62128VLL-70ZAIT Datasheet - Page 6

CY62128VLL-70ZAIT

Manufacturer Part Number
CY62128VLL-70ZAIT
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY62128VLL-70ZAIT

Density
1Mb
Access Time (max)
70ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
3.3V
Address Bus
17b
Package Type
STSOP-I
Operating Temp Range
-40C to 85C
Number Of Ports
1
Supply Current
40mA
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Word Size
8b
Number Of Words
128K
Lead Free Status / Rohs Status
Not Compliant
Switching Waveforms
Read Cycle No. 1
Read Cycle No. 2 (OE Controlled)
Write Cycle No. 1 (CE
Notes:
10. Device is continuously selected. OE, CE = V
12. Address valid prior to or coincident with CE
13. Data I/O is high impedance if OE = V
14. If CE
DATA OUT
11. WE is HIGH for read cycle.
ADDRESS
DATA I/O
CURRENT
DATA OUT
ADDRESS
ADDRESS
SUPPLY
CE
CE
WE
CE
CE
V
OE
1
CC
1
2
goes HIGH or CE
1
2
[10, 11]
2
PREVIOUS DATA VALID
goes LOW simultaneously with WE HIGH, the output remains in a high-impedance state.
1
HIGH IMPEDANCE
or CE
t
PU
t
2
LZCE
Controlled)
IH
.
[11, 12]
t
t
ACE
LZOE
1
IL,
t
SA
transition LOW and CE
CE
t
50%
OHA
t
DOE
2
=V
[13,14]
IH
.
t
AA
t
AW
2
t
transition HIGH.
RC
t
WC
6
t
PWE
t
RC
DATA VALID
t
SCE
t
t
SD
SCE
DATA VALID
t
HD
t
DATA VALID
HZOE
t
HA
CY62128V Family
t
HZCE
t
PD
50%
IMPEDANCE
HIGH
62128V–8
62128V-9
62128V-10
I
I
CC
SB

Related parts for CY62128VLL-70ZAIT