AT49LV002-70JC Atmel, AT49LV002-70JC Datasheet - Page 5

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AT49LV002-70JC

Manufacturer Part Number
AT49LV002-70JC
Description
Manufacturer
Atmel
Datasheet

Specifications of AT49LV002-70JC

Cell Type
NOR
Density
2Mb
Access Time (max)
70ns
Interface Type
Parallel
Boot Type
Bottom
Address Bus
18b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
0C to 70C
Package Type
PLCC
Program/erase Volt (typ)
3 to 3.6V
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Word Size
8b
Number Of Words
256K
Supply Current
25mA
Mounting
Surface Mount
Pin Count
32
Lead Free Status / Rohs Status
Not Compliant
AT49BV/LV002(N)(T)
DATA POLLING: The AT49BV/LV002(N)(T) features DATA polling to indicate the end of a
program cycle. During a program cycle an attempted read of the last byte loaded will result in
the complement of the loaded data on I/O7. Once the program cycle has been completed, true
data is valid on all outputs and the next cycle may begin. DATA polling may begin at any time
during the program cycle.
TOGGLE BIT: In addition to DATA polling the AT49BV/LV002(N)(T) provides another method
for determining the end of a program or erase cycle. During a program or erase operation,
successive attempts to read data from the device will result in I/O6 toggling between one and
zero. Once the program cycle has completed, I/O6 will stop toggling and valid data will be
read. Examining the toggle bit may begin at any time during a program cycle.
HARDWARE DATA PROTECTION: Hardware features protect against inadvertent programs
to the AT49BV/LV002(N)(T) in the following ways: (a) V
sense: if V
is below 1.8V (typical),
CC
CC
the program function is inhibited. (b) Program inhibit: holding any one of OE low, CE high or
WE high inhibits program cycles. (c) Noise filter: pulses of less than 15 ns (typical) on the WE
or CE inputs will not initiate a program cycle.
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0982D–FLASH–02/03

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