CY7C1019CV33-15ZCT Cypress Semiconductor Corp, CY7C1019CV33-15ZCT Datasheet - Page 4

CY7C1019CV33-15ZCT

Manufacturer Part Number
CY7C1019CV33-15ZCT
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1019CV33-15ZCT

Density
1Mb
Access Time (max)
15ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
3.3V
Address Bus
17b
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Number Of Ports
1
Supply Current
70mA
Operating Supply Voltage (min)
2.97V
Operating Supply Voltage (max)
3.63V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
32
Word Size
8b
Number Of Words
128K
Lead Free Status / Rohs Status
Not Compliant
Document #: 38-05130 Rev. *F
AC Test Loads and Waveforms
Switching Characteristics
OUTPUT
Read Cycle
t
t
t
t
t
t
t
t
t
t
t
Write Cycle
t
t
t
t
t
t
t
t
t
t
Notes:
10. The minimum write cycle time for Write Cycle no. 3 (WE controlled, OE LOW) is the sum of t
Parameter
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
WC
SCE
AW
HA
SA
PWE
SD
HD
LZWE
HZWE
4. AC characteristics (except High-Z) for all speeds are tested using the Thevenin load shown in Figure (a). High-Z characteristics are tested for all speeds using
5. Test conditions assume signal transition time of 3 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V.
6. t
7. At any given temperature and voltage condition, t
8. This parameter is guaranteed by design and is not tested.
9. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. CE and WE must be LOW to initiate a write, and the transition of
the test load shown in Figure (c).
any of these signals can terminate the write. The input data set-up and hold timing should be referenced to the leading edge of the signal that terminates the write.
[8]
[8]
HZOE
3.3V
, t
HZCE
30 pF
[9, 10]
, and t
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE LOW to Data Valid
OE LOW to Data Valid
OE LOW to Low Z
OE HIGH to High Z
CE LOW to Low Z
CE HIGH to High Z
CE LOW to Power-Up
CE HIGH to Power-Down
Write Cycle Time
CE LOW to Write End
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
WE Pulse Width
Data Set-Up to Write End
Data Hold from Write End
WE HIGH to Low Z
WE LOW to High Z
(a)
HZWE
R 317Ω
are specified with a load capacitance of 5 pF as in part (d) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage.
351Ω
Description
R2
[7]
Over the Operating Range
[6, 7]
[7]
[6, 7]
[6, 7]
GND
3.0V
Rise Time: 1 V/ns
[4]
HZCE
is less than t
10%
90%
LZCE
Min.
ALL INPUT PULSES
10
10
, t
3
0
3
0
8
8
0
0
7
5
0
3
[5]
HZOE
(b)
-10
is less than t
Max.
10
10
10
5
5
5
5
LZOE
HZWE
Fall Time: 1 V/ns
90%
, and t
Min.
and t
12
12
10%
3
0
3
0
9
9
0
0
8
6
0
3
HZWE
SD
-12
.
is less than t
High-Z characteristics:
Max.
12
12
12
OUTPUT
6
6
6
6
3.3V
LZWE
CY7C1019CV33
Min.
15
15
10
10
10
3
0
3
0
0
0
8
0
3
for any given device.
5 pF
-15
(c)
Max.
R 317Ω
15
15
15
7
7
7
7
Page 4 of 10
Unit
R2
351Ω
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
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