ELANSC410-66AC AMD (ADVANCED MICRO DEVICES), ELANSC410-66AC Datasheet - Page 41

• Manufacturer Part Number: ELANSC410-66AC
• Manufacturer: AMD (ADVANCED MICRO DEVICES)

Specifications of ELANSC410-66AC

• Lead Free Status / Rohs Status: Not Compliant

Group
Power-Down Group: The signals on the chip are
grouped together by interface for the purpose of
powering down chips on the system board that are
connected to these signals in Suspend mode. The
letters A–I in the Power-Down Group column indi-
cate the group with which each affected signal is as-
sociated. Only those signals that have a different
Suspend state based on the interface powering off
have a letter. The interfaces are identified in
Table 5. The extended registers have bits that allow
components connected to each interface to be pow-
ered down in Suspend mode. Care must be taken
when designing a system with sections that power
down, because many signals are shared between
components.
A
B
C
D
E
G
H
F
I
Table 4. Power Pin Type Abbreviations
Symbol
Table 5. Power-Down Groups
CPU
Interface
DRAM
ROM
ISA (shared ISA signals individually enabled)
Serial port, serial IrDA infrared port
GPIO Chip Selects 1–0
VL bus
PC Card Socket A
PC Card Socket B and parallel port
SD buffer control signals
RTC
V
A
CC
Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
Pin is an analog input
CPU power input
Real-time clock input
Power input
Meaning
Using the Pin State Tables
In the following Pin State tables, multiplexed pins in-
clude values specific to each signal in the row (across
the table) where that signal is named. If a cell has only
one value listed for two or three different signals, then
this value is constant (does not change) no matter what
signal is programmed to come out on the pin.
5 V: An S in the 5 V column denotes pins that are
5-volt safe. This means these signals can tolerate 5
volts and they will not be damaged. However, they
cannot drive to 5 volts.
For example, in the table on page 47, when pin V14
is GPIO19, it is bidirectional; when pin V14 is LBL2,
it is an output only. Because the cell includes two
separate lines, the pin type is unique for each signal.
When the V14 pin is either GPIO19 or LBL2, the
reset state is I-PU. Because there is only one value
shown in the table, this value applies to both signals.
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