74LVCH245ABQ NXP Semiconductors, 74LVCH245ABQ Datasheet - Page 3
![](/photos/40/56/405661/sot764-1_sml.jpg)
74LVCH245ABQ
Manufacturer Part Number
74LVCH245ABQ
Description
Manufacturer
NXP Semiconductors
Datasheet
1.74LVCH245ABQ.pdf
(17 pages)
Specifications of 74LVCH245ABQ
Logic Family
LVC
Operating Supply Voltage (typ)
1.8/2.5/3.3V
Propagation Delay Time
12ns
Number Of Elements
1
Number Of Channels
8
Input Logic Level
LVTTL
Output Logic Level
LVTTL
Output Type
3-State
Package Type
DHVQFN EP
Polarity
Non-Inverting
Logical Function
Bus Transceiver
Operating Supply Voltage (min)
1.2V
Operating Supply Voltage (max)
3.6V
Quiescent Current (typ)
100nA
Technology
CMOS
Operating Temp Range
-40C to 125C
Operating Temperature Classification
Automotive
Mounting
Surface Mount
Pin Count
20
Lead Free Status / Rohs Status
Compliant
NXP Semiconductors
5. Pinning information
Table 2.
74LVC_LVCH245A_5
Product data sheet
Symbol
DIR
A0 to A7
GND
B0 to B7
OE
V
Fig 3.
CC
Pin configuration for SO20 and (T)SSOP20
Pin description
GND
DIR
A0
A1
A2
A3
A4
A5
A6
A7
10
5.1 Pinning
1
2
3
4
5
6
7
8
9
5.2 Pin description
Pin
1
2, 3, 4, 5, 6, 7, 8, 9
10
18, 17, 16, 15, 14, 13, 12, 11
19
20
74LVCH245A
74LVC245A
001aak292
20
19
18
17
16
15
14
13
12
11
V
OE
B0
B1
B2
B3
B4
B5
B6
B7
CC
Rev. 05 — 25 August 2009
Description
direction control
data input/output
ground (0 V)
data input/output
output enable input (active LOW)
supply voltage
74LVC245A; 74LVCH245A
Fig 4.
(1) The die substrate is attached to this pad using
conductive die attach material. It can not be used as a
supply pin or input.
Pin configuration for DHVQFN20 and
DHXQFN20U
index area
terminal 1
A0
A1
A2
A3
A4
A5
A6
A7
Transparent top view
2
3
4
5
6
7
8
9
74LVCH245A
Octal bus transceiver; 3-state
74LVC245A
GND
(1)
19
18
17
16
15
14
13
12
© NXP B.V. 2009. All rights reserved.
001aak293
OE
B0
B1
B2
B3
B4
B5
B6
3 of 17