TE28F256J3C125 Intel, TE28F256J3C125 Datasheet - Page 24

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TE28F256J3C125

Manufacturer Part Number
TE28F256J3C125
Description
Manufacturer
Intel
Datasheet

Specifications of TE28F256J3C125

Cell Type
NOR
Density
256Mb
Access Time (max)
125ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
25/24Bit
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Program/erase Volt (typ)
2.7 to 3.6V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
8/16Bit
Number Of Words
32M/16M
Mounting
Surface Mount
Pin Count
56
Lead Free Status / Rohs Status
Not Compliant

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256-Mbit J3 (x8/x16)
24
A[MAX:3] [A]
D[15:0] [Q]
A[2:1] [A]
WE# [W]
Figure 10. 4-Word Page Mode Read Waveform
OE# [G]
RP# [P]
CEx [E]
NOTES:
NOTE: CE
1. CE
2. When reading the flash array a faster t
first edge of CE0, CE1, or CE2 that disables the device (see
Register reads, query reads, or device identifier reads).
X
low is defined as the last edge of CE0, CE1, or CE2 that enables the device. CE
the first edge of CE0, CE1, or CE2 that disables the device (see
X
low is defined as the last edge of CE0, CE1, or CE2 that enables the device. CE
R6
R5
R7
R2
R3
R4
00
1
GLQV
(R16) applies. For non-array reads, R4 applies (i.e.: Status
R10
R1
R1
R15
01
2
Table
13).
10
Table
3
13).
X
11
high is defined at the
4
X
high is defined at
R10
Datasheet
R9
R8
0606_16

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