CY7C4292V-10ASC Cypress Semiconductor Corp, CY7C4292V-10ASC Datasheet
CY7C4292V-10ASC
Specifications of CY7C4292V-10ASC
Related parts for CY7C4292V-10ASC
CY7C4292V-10ASC Summary of contents
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... High-speed, low-power, first-in first-out (FIFO) memories • 64K × 9 (CY7C4282V) • 128K × 9 (CY7C4292V) • 0.35 micron CMOS for optimum speed/power • High-speed, Near-Zero Latency (True Dual-Ported Memory Cell), 100-MHz operation (10 ns read/write cycle times) • ...
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... The rising edge clocks data out of the FIFO when REN is LOW and the FIFO is not Empty. When LD is LOW, RCLK reads data out of the programmable flag-offset register. CY7C4282V CY7C4292V GND GND N GND FL/RT N/C 7C4282V/92V-25 Unit 66.7 40 MHz CY7C4292V Page [+] Feedback ...
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... The second, third, and fourth LOW-to-HIGH transitions of WCLK store data in the empty offset most significant bit (MSB) register, full offset LSB register, and full offset MSB register, respectively, when LD CY7C4282V CY7C4292V standard mode or width expansion, FL outputs 0-8 ...
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... LOW when the number of unread words in the FIFO (MSB) is greater than or equal to CY7C4282V (64K – m) and Default Value = 000h CY7C4292V (128K – m). PAF is set HIGH by the LOW-to- HIGH transition of WCLK when the number of available 0 memory locations is greater than m. Full Offset (LSB) Reg ...
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... Read Enable (REN) control input can be grounded (see Figure 2). In this configuration, the Load (LD) pin is set to LOW at Reset so that the pin operates as a control to load and read the programmable flag offsets. RESET (RS) 9 7C4282V 7C4292V FIRST LOAD (FL) EXPANSION IN (XI) Used in a Width-Expansion Configuration CY7C4282V CY7C4292V FF PAF PAE ...
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... Programmable Flags used in Depth Expansion Configuration Document #: 38-06014 Rev RCLK WCLK REN WEN OE RS 7C4282V D 7C4292V RCLK WCLK REN WEN OE RS 7C4282V D 7C4292V READ CLOCK (RCLK) XO WCLK RCLK READ ENABLE (REN) WEN REN OUTPUTENABLE (OE) RS 7C4282V OE 7C4292V CY7C4282V CY7C4292V DATA OUT (Q) EF Page [+] Feedback ...
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... Com’l 25 Ind Com’l 6 Ind Test Conditions MHz 3.3V CC [10, 11] 3.0V R2=510 GND 3 ns 2.0V CY7C4282V CY7C4292V +0.5V CC [6] Ambient Temperature +70 C 3.3V 300 +85 C 3.3V 300 mV 7C4282V/92V 7C4282V/92V -15 -25 Min. Max. Min. Max. Unit 2.4 2.4 V 0.4 0 ...
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... Pulse widths less than minimum values are not allowed. 13. Values guaranteed by design, not currently tested. Document #: 38-06014 Rev. *B [10, 11] (continued) ALL INPUT PULSES 3.0V 90% 10% GND 3 ns 7C4282V/92V 7C4282V/92V -10 Min. Max. Min. 100 4.5 6 4 [13 [13 CY7C4282V CY7C4292V 90% 10 7C4282V/92V -15 -25 Max. Min. Max. Unit 66.7 40 MHz ...
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... CLK t CLKL NO OPERATION t REF VALID DATA t OE [15] t SKEW1 , then FF may not change state until the next WCLK rising edge. SKEW1 , then EF may not change state until the next RCLK rising edge. SKEW2 CY7C4282V CY7C4292V NO OPERATION t WFF REF t OHZ Page [+] Feedback ...
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... The first word is available the cycle after EF goes HIGH, always. Document #: 38-06014 Rev RSS RSR t RSF t RSF t RSF [19] t FRL t REF OLZ When t < minimum specification, t CLK SKEW2 SKEW1 CY7C4282V CY7C4292V [18] OE=1 OE [20 (maximum) = either 2 FRL CLK SKEW1 CLK SKEW1 Page [+] Feedback ...
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... DATA IN OUTPUT REGISTER 0 8 Document #: 38-06014 Rev DATA WRITE 2 t ENS REF REF SKEW2 t A [14 SKEW1 DATA WRITE t WFF t ENS DATA READ CY7C4282V CY7C4292V t ENH [19] t FRL t REF DATA READ NO WRITE DATA WRITE t WFF t ENH t A NEXT DATA READ Page [+] Feedback ...
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... ENS ENH 22 Note t PAE t ENS Note 24 t CLKL t t ENS ENH t PAF t t ENS (m 1) words of the FIFO when PAF goes LOW. CY7C4282V CY7C4292V WORDS 23 Note IN FIFO t PAE t t ENS ENH FULL M WORDS [25] IN FIFO [26] t PAF SKEW2 t t ENS ENH ...
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... Document #: 38-06014 Rev CLKL t ENH t DH PAE OFFSET PAF OFFSET LSB MSB t CLKL t ENH t A UNKNOWN PAE OFFSET LSB t PRT to update these flags. RTR CY7C4282V CY7C4292V PAF OFFSET LSB MSB PAF OFFSET MSB PAF OFFSET PAE OFFSET MSB LSB t RTR . RTR Page [+] Feedback ...
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... CY7C4282V-15ASC CY7C4282V-15ASI 128K x 9 Low Voltage Deep Sync FIFO Speed (ns) Ordering Code 10 CY7C4292V-10ASC 15 CY7C4292V-15ASC CY7C4292V-15ASI Package Diagram 64-Pin Thin Plastic Quad Flat Pack ( 1.4 mm) A64 All product and company names mentioned in this document are the trademarks of their respective holders. Document #: 38-06014 Rev. *B © ...
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... Document History Page Document Title: CY7C4282V/CY7C4292V 64K/128K x 9 Low-Voltage Deep Sync FIFOs with Retransmit and Depth Expansion Document Number: 38-06014 REV. ECN NO. Issue Date ** 106475 09/15/01 *A 122266 12/26/02 *B 127859 08/25/03 Document #: 38-06014 Rev. *B Orig. of Change Description of Change SZV Change from Spec number: 38-00657 to 38-06014 ...