CY7C1351F-100BGC Cypress Semiconductor Corp, CY7C1351F-100BGC Datasheet
CY7C1351F-100BGC
Specifications of CY7C1351F-100BGC
Related parts for CY7C1351F-100BGC
CY7C1351F-100BGC Summary of contents
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... The CY7C1351F is a 3.3V, 128K x 36 Synchronous Flow-through Burst SRAM designed specifically to support unlimited true back-to-back Read/Write operations without the insertion of wait states. The CY7C1351F is equipped with the advanced No Bus Latency™ (NoBL™) logic required to enable consecutive Read/Write operations with data being transferred on every clock cycle ...
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... DQP DDQ BYTE DDQ DDQ BYTE DDQ DQP 30 D Document #: 38-05210 Rev. *B 133 MHz 117 MHz 6.5 7.5 225 220 40 40 100-lead TQFP CY7C1351F CY7C1351F 100 MHz 66 MHz Unit 8.0 11.0 ns 205 195 DQP DDQ BYTE DDQ DDQ BYTE DDQ DQP ...
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... CLK is qualified with CEN. CLK is only recognized if CEN is active LOW. E4 Input- Chip Enable 1 Input, active LOW. Sampled on the rising edge Synchronous of CLK. Used in conjunction with CE lect the device. B2 Input- Chip Enable 2 Input, active HIGH. Sampled on the rising edge Synchronous of CLK. Used in conjunction with CE the device. CY7C1351F DDQ ...
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... Power Supply Power supply inputs to the core of the device. J6 I/O Power Sup- Power supply for the I/O circuitry. ply Ground Ground for the device. N5,P5 – No Connects. Not Internally connected to the die. CY7C1351F Description and CE to select/deselect 1 2 and DQP are placed [A:D] ...
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... Byte write capability has been included in order to greatly simplify Read/Modify/Write sequences, which can be reduced to simple byte write opera- tions. Because the CY7C1351F is a common I/O device, data should , CE , not be driven into the device while the outputs are active. The ...
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... This parameter is sampled ADV/ data when OE is active. [A:D] CY7C1351F ) DD Second Third Address Address Address A1 Min. Max CYC 2t CYC 2t CYC CEN CLK L->H Three-state L->H Three-state L->H Three-state L->H Three-state L->H Data Out ( L->H Data Out ( L->H Three-state L->H Three-state L L ...
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... DQP ) C C Write Byte D– (DQ and DQP ) D D Write All Bytes Note: 9. Table only lists a partial listing of the byte write combinatios. Any combination of BW Document #: 38-05210 Rev valid. Appropriate write will be done based on which byte write is active. [A:D] CY7C1351F Page ...
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... Max, Device Deselected, DD ≥ V ≤ 0.3V, V – 0. inputs static /2), undershoot: V (AC)> -2V (Pulse width less than t CYC IL (min.) within 200ms. During this time V < CY7C1351F Ambient ) 0°C to +70°C 3.3V - 5%/+10% 2. Min. Max. 3.135 3.6 2.375 V 2.4 2.0 0.4 0.4 2.0 ...
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... MHz 3. =3.3V DDQ R = 317Ω 3.3V OUTPUT 351Ω INCLUDING JIG AND (b) SCOPE R = 1667Ω 2.5V OUTPUT =1538Ω INCLUDING JIG AND (b) SCOPE CY7C1351F Min. Max TQFP BGA Package Package 41.83 47.63 9.99 11.71 BGA TQFP Package Package ALL INPUT PULSES ...
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... SRAMs when sharing the same OELZ CHZ CLZ =3.3V and is 1.25V when V = 2.5V. DDQ CY7C1351F 133 MHz 117 MHz 100 MHz 8.5 10 3.0 4.0 3.0 4.0 6.5 7 ...
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... OEHZ BURST READ READ BURST WRITE Q(A3) Q(A4) D(A2+1) Q(A4+1) DON’T CARE UNDEFINED [19, 20, 22 Q(A2) Q(A3) STALL READ WRITE Q(A3) D(A4) DON’T CARE CY7C1351F OEV t CHZ Q(A4) Q(A4+1) D(A5) Q(A6) t DOH t OELZ WRITE READ WRITE READ D(A5) Q(A6) D(A7 ...
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... CY7C1351F-133BGC CY7C1351F-133AI CY7C1351F-133BGI 117 CY7C1351F-117AC CY7C1351F-117BGC CY7C1351F-117AI CY7C1351F-117BGI 100 CY7C1351F-100AC CY7C1351F-100BGC CY7C1351F-100AI CY7C1351F-100BGI 66 CY7C1351F-66AC CY7C1351F-66BGC CY7C1351F-66AI CY7C1351F-66BGI Shaded areas contain advance information. Please contain your local sales representative for more information on ordering these parts. Notes: 19. For this waveform ZZ is tied low. ...
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... Package Diagrams 100-Pin Thin Plastic Quad Flatpack ( 1.4 mm) A101 Document #: 38-05210 Rev. *B CY7C1351F 51-85050-*A Page ...
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... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 119-Lead PBGA ( 2.4 mm) BG119 CY7C1351F 51-85115-*B Page ...
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... Document History Page Document Title: CY7C1351F 4-Mb (128K x 36) Flow-through SRAM with NoBL™ Architecture Document Number: 38-05210 REV. ECN NO. Issue Date ** 119833 01/07/03 *A 123846 01/18/03 *B 200664 See ECN Document #: 38-05210 Rev. *B Orig. of Change Description of Change HGK New Data Sheet AJH ...