CY7C1011CV33-15BVI Cypress Semiconductor Corp, CY7C1011CV33-15BVI Datasheet

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CY7C1011CV33-15BVI

Manufacturer Part Number
CY7C1011CV33-15BVI
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C1011CV33-15BVI

Lead Free Status / Rohs Status
Not Compliant
Cypress Semiconductor Corporation
Document #: 38-05232 Rev. *B
Features
Functional Description
The CY7C1011CV33 is a high-performance CMOS Static
RAM organized as 131,072 words by 16 bits.
Writing to the device is accomplished by taking Chip Enable
(CE) and Write Enable (WE) inputs LOW. If Byte Low Enable
(BLE) is LOW, then data from I/O pins (I/O
• Pin equivalent to CY7C1011BV33
• High speed
• Low active power
• Data Retention at 2.0
• Automatic power-down when deselected
• Independent control of upper and lower bits
• Easy memory expansion with CE and OE features
• Available in 44-pin TSOP II, 44-pin TQFP, and 48-ball
A
A
A
A
A
A
A
A
A
Logic Block Diagram
0
1
2
3
4
5
6
7
8
VFBGA
— t
— 360 mW (max.)
AA
= 10 ns
INPUT BUFFER
1024 x 4096
DECODER
COLUMN
256K x 16
ARRAY
0
through I/O
3901 North First Street
7
), is
I/O
I/O
0
8
– I/O
– I/O
BHE
WE
CE
OE
BLE
written into the location specified on the address pins (A
through A
from I/O pins (I/O
specified on the address pins (A
Reading from the device is accomplished by taking Chip
Enable (CE) and Output Enable (OE) LOW while forcing the
Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW,
then data from the memory location specified by the address
pins will appear on I/O
LOW, then data from memory will appear on I/O
the truth table at the back of this data sheet for a complete
description of read and write modes.
The input/output pins (I/O
high-impedance state when the device is deselected (CE
HIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE
LOW, and WE LOW).
The CY7C1011CV33 is available in a standard 44-pin TSOP
II package with center power and ground pinout, a 44-pin Thin
Plastic Quad Flatpack (TQFP), as well as a 48-ball fine-pitch
ball grid array (VFBGA) package.
7
15
16
San Jose
). If Byte High Enable (BHE) is LOW, then data
128K x 16 Static RAM
8
through I/O
Pin Configuration
I/O
I/O
I/O
I/O
V
I/O
I/O
I/O
I/O
0
V
A
A
WE
A
A
A
CE
CC
A
A
A
A
A
SS
16
14
13
12
to I/O
15
4
3
2
1
0
0
1
2
3
4
5
6
7
0
CA 95134
13
14
15
16
17
18
19
20
21
22
1
2
3
4
5
6
7
8
9
10
11
12
through I/O
Top View
7
TSOP II
. If Byte High Enable (BHE) is
15
0
) is written into the location
through A
Revised October 10, 2002
CY7C1011CV33
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
A
A
A
OE
BHE
BLE
I/O
I/O
I/O
I/O
V
V
I/O
I/O
I/O
I/O
NC
A
A
A
A
NC
15
SS
CC
5
6
7
8
9
10
11
) are placed in a
15
14
13
12
11
10
9
8
16
).
408-943-2600
8
to I/O
15
. See
0

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CY7C1011CV33-15BVI Summary of contents

Page 1

... HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW). The CY7C1011CV33 is available in a standard 44-pin TSOP II package with center power and ground pinout, a 44-pin Thin Plastic Quad Flatpack (TQFP), as well as a 48-ball fine-pitch ball grid array (VFBGA) package ...

Page 2

... I/O Document #: 38-05232 Rev. *B -10 10 Comm’l 90 Ind’l 100 10 44-pin TQFP (Top View 48-ball VFBGA (Top View BLE I/O BHE I/O I I/O I I/O I CY7C1011CV33 -12 - I/O 15 I/O 14 I I/O 11 I/O 10 I Unit Page ...

Page 3

... < MAX Max Com’ > V – 0.3V, Ind’ > V – 0.3V < 0.3V Test Conditions MHz CY7C1011CV33 [2] ................................ –0. Ambient Temperature +70 C – +85 C -10 -12 -15 Max. Min. Max. Min. 2.4 2.4 0.4 0.4 V 2 0.3 + 0.3 0.8 –0.3 0.8 –0.3 – ...

Page 4

... Document #: 38-05232 Rev pF* 1.5V (a) 90% 10% (c) Fall Time: 1 V/ns [4] Over the Operating Range -10 Min [ [ less than less than t HZCE LZCE HZOE CY7C1011CV33 12-, 15-ns devices: R 317 3.3V OUTPUT 30 pF 351 (b) High-Z characteristics: R 317 3.3V OUTPUT 351 (d) -12 -15 Max. Min. Max. Min. Max ...

Page 5

... PREVIOUS DATA VALID Notes: 10. Device is continuously selected. OE, CE, BHE and/or BHE = V 11 HIGH for read cycle. Document #: 38-05232 Rev. *B Over the Operating Range (continued) -10 Min [ DATA RETENTION MODE 3.0V V > CDR OHA . IL CY7C1011CV33 [4] -12 -15 Max. Min. Max. Min. Max 3. DATA VALID Unit ...

Page 6

... Data I/O is high-impedance BHE and/or BLE = V 14 goes HIGH simultaneously with WE going HIGH, the output remains in a high-impedance state. Document #: 38-05232 Rev. *B [11, 12 ACE t DOE t LZOE t DBE t LZBE 50% [13, 14 SCE PWE CY7C1011CV33 t HZOE t HZCE t HZBE IMPEDANCE DATA VALID HIGH I ICC CC I ISB SB Page ...

Page 7

... Switching Waveforms (continued) Write Cycle No. 2 (BLE or BHE Controlled) ADDRESS t SA BHE, BLE WE CE DATAI/O Write Cycle No. 3 (WE Controlled, ADDRESS BHE, BLE DATA I/O Document #: 38-05232 Rev PWE t SCE SCE PWE HZWE SD CY7C1011CV33 LZWE Page ...

Page 8

... Ordering Code 10 CY7C1011CV33-10ZC CY7C1011CV33-10BVC CY7C1011CV33-10ZI CY7C1011CV33-10BVI 12 CY7C1011CV33-12ZC CY7C1011CV33-12AC CY7C1011CV33-12BVC CY7C1011CV33-12ZI CY7C1011CV33-12AI CY7C1011CV33-12BVI 15 CY7C1011CV33-15ZC CY7C1011CV33-15AC CY7C1011CV33-15BVC CY7C1011CV33-15ZI CY7C1011CV33-15AI CY7C1011CV33-15BVI Document #: 38-05232 Rev. *B I/O –I/O I/O –I High-Z High-Z Data Out Data Out Data Out High-Z High-Z Data Out Data In Data In Data In ...

Page 9

... Package Diagrams Document #: 38-05232 Rev. *B 44-Pin TSOP II Z44 44-Lead Thin Plastic Quad Flat Pack A44 CY7C1011CV33 51-85087-*A 51-85064-*B Page ...

Page 10

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 48-Lead VFBGA ( mm) BV48A CY7C1011CV33 51-85150-*A Page ...

Page 11

... Document History Page Document Title: CY7C1011CV33 128K x 16 Static RAM Document Number: 38-05232 Issue REV. ECN NO. Date ** 117132 07/31/02 *A 118057 08/19/02 *B 119702 10/11/02 Document #: 38-05232 Rev. *B Orig. of Change HGK New Data Sheet HGK Pin configuration for 48-ball FBGA correction DFP Updated FBGA to VFBGA; updated package code on page 8 to BV48A. ...

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