CY62167DV30LL-70ZI Cypress Semiconductor Corp, CY62167DV30LL-70ZI Datasheet - Page 5

• Manufacturer Part Number: CY62167DV30LL-70ZI
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY62167DV30LL-70ZI

• Density: 16Mb
• Access Time (max): 70ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 3V
• Address Bus: 20b
• Package Type: TSOP-I
• Operating Temp Range: -40C to 85C
• Number Of Ports: 1
• Supply Current: 25mA
• Operating Supply Voltage (min): 2.2V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 48
• Word Size: 16b
• Number Of Words: 1M
• Lead Free Status / Rohs Status: Not Compliant

Document #: 38-05328 Rev. *F
Switching Characteristics
Read Cycle
t
t
t
t
t
t
t
t
t
t
t
t
t
t
Write Cycle
t
t
t
t
t
t
t
t
t
t
t
Notes:
15. Test conditions for all parameters other than three-state parameters assume signal transition time of 1 ns/V, timing reference levels of V
16. At any given temperature and voltage condition, t
17. t
18. The internal Write time of the memory is defined by the overlap of WE, CE
RC
AA
OHA
ACE
DOE
LZOE
HZOE
LZCE
HZCE
PU
PD
DBE
LZBE
HZBE
WC
SCE
AW
HA
SA
PWE
BW
SD
HD
HZWE
LZWE
levels of 0 to V
given device.
a write and any of these signals can terminate a write by going INACTIVE. The data input set-up and hold timing should be referenced to the edge of the signal
that terminates the Write.
HZOE
Parameter
, t
HZCE
, t
[18]
HZBE
CC(typ.)
, and t
Read Cycle Time
Address to Data Valid
Data Hold from Address Change
CE
OE LOW to Data Valid
OE LOW to LOW Z
OE HIGH to High Z
CE
CE
CE
CE
BLE/BHE LOW to Data Valid
BLE/BHE LOW to Low Z
BLE/BHE HIGH to HIGH Z
Write Cycle Time
CE
Address Set-Up to Write End
Address Hold from Write End
Address Set-Up to Write Start
WE Pulse Width
BLE/BHE LOW to Write End
Data Set-Up to Write End
Data Hold from Write End
WE LOW to High-Z
WE HIGH to Low-Z
, and output loading of the specified I
HZWE
1
1
1
1
1
1
HIGH and CE
HIGH and CE
LOW and CE
LOW and CE
LOW and CE
LOW and CE
transitions are measured when the outputs enter a high impedance state.
Description
Over the Operating Range
2
2
2
2
2
2
[16]
[16, 17]
[16, 17]
[16]
HIGH to Data Valid
HIGH to Low Z
LOW to High Z
HIGH to Power-up
LOW to Power-down
HIGH to Write End
HZCE
[16]
is less than t
[16, 17]
OL
/I
OH
[16, 17]
as shown in the “AC Test Loads and Waveforms” section.
[16]
LZCE
, t
HZBE
1
[15]
= V
Min.
45
10
10
10
45
40
40
35
40
25
10
IL
is less than t
5
0
0
0
0
45 ns
, BHE and/or BLE = V
[12]
Max.
45
45
25
15
20
45
45
15
15
LZBE
, t
HZOE
Min.
55
10
10
10
55
40
40
40
40
25
10
IL
5
0
0
0
0
is less than t
, and CE
55 ns
Max.
2
55
55
25
20
20
55
55
20
20
= V
LZOE
IH
. All signals must be ACTIVE to initiate
, and t
Min.
70
10
10
70
60
60
10
10
60
45
30
5
0
0
0
0
HZWE
CY62167DV30
70 ns
is less than t
Max.
CC(typ)
70
70
35
25
25
70
70
25
25
MoBL
/2, input pulse
Page 5 of 12
LZWE
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
for any
®