CY62157DV30LL-70BVI Cypress Semiconductor Corp, CY62157DV30LL-70BVI Datasheet

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CY62157DV30LL-70BVI

Manufacturer Part Number
CY62157DV30LL-70BVI
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY62157DV30LL-70BVI

Density
8Mb
Access Time (max)
70ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
2.5/3.3V
Address Bus
19b
Package Type
VFBGA
Operating Temp Range
-40C to 85C
Number Of Ports
1
Supply Current
15mA
Operating Supply Voltage (min)
2.2V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
48
Word Size
16b
Number Of Words
512K
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
CY62157DV30LL-70BVI
Manufacturer:
CY
Quantity:
535
Cypress Semiconductor Corporation
Document #: 38-05392 Rev. *H
Features
Note:
1. For best practice recommendations, please refer to the Cypress application note entitled System Design Guidelines, which is available at http://www.cypress.com.
• Temperature Ranges
• Very high speed: 45 ns
• Wide voltage range: 2.20V–3.60V
• Pin-compatible with CY62157CV25, CY62157CV30, and
• Ultra-low active power
• Ultra-low standby power
• Easy memory expansion with CE
• Automatic power-down when deselected
• CMOS for optimum speed/power
• Available in Pb-free and non Pb-free 48-ball FBGA,
Logic Block Diagram
— Industrial: –40°C to 85°C
— Automotive-A: –40°C to 85°C
— Automotive-E: –40°C to 125°C
CY62157CV33
— Typical active current: 1.5 mA @ f = 1 MHz
— Typical active current: 12 mA @ f = f
features
44-pin TSOPII, and Pb-free 48-pin TSOPI
A
A
A
A
A
A
A
A
A
A
A
10
9
8
7
6
5
4
3
2
1
0
1
, CE
Power-down
COLUMN DECODER
2
DATA-IN DRIVERS
Circuit
max
, and OE
RAM Array
198 Champion Court
512K × 16
8-Mbit (512K x 16) MoBL
Functional Description
The CY62157DV30 is a high-performance CMOS static RAM
organized as 512K words by 16 bits. This device features
advanced circuit design to provide ultra-low active current.
This is ideal for providing More Battery Life™ (MoBL
portable applications such as cellular telephones.The device
also has an automatic power-down feature that significantly
reduces power consumption. The device can also be put into
standby mode when deselected (CE
both BHE and BLE are HIGH). The input/output pins (I/O
through I/O
deselected (CE
HIGH), both Byte High Enable and Byte Low Enable are
disabled (BHE, BLE HIGH), or during a write operation (CE
LOW, CE
Writing to the device is accomplished by taking Chip Enables
(CE
If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O
through I/O
address pins (A
LOW, then data from I/O pins (I/O
the location specified on the address pins (A
Reading from the device is accomplished by taking Chip
Enables (CE
LOW while forcing the Write Enable (WE) HIGH. If Byte Low
Enable (BLE) is LOW, then data from the memory location
specified by the address pins will appear on I/O
High Enable (BHE) is LOW, then data from memory will appear
on I/O
of read and write modes.
1
LOW and CE
8
to I/O
2
San Jose
HIGH and WE LOW).
15
7
I/O
I/O
), is written into the location specified on the
1
15
) are placed in a high-impedance state when:
LOW and CE
0
8
1
. See the truth table for a complete description
–I/O
–I/O
0
HIGH or CE
BHE
WE
OE
BLE
through A
2
7
15
HIGH) and Write Enable (WE) input LOW.
,
CA 95134-1709
CY62157DV30 MoBL
18
2
2
CE
CE
LOW), outputs are disabled (OE
HIGH) and Output Enable (OE)
). If Byte High Enable (BHE) is
[1]
1
2
8
Revised August 8, 2006
through I/O
®
1
HIGH or CE
Static RAM
0
15
through A
0
) is written into
408-943-2600
to I/O
2
7
LOW or
. If Byte
18
®
) in
).
®
0
1
0
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CY62157DV30LL-70BVI Summary of contents

Page 1

... A 0 Note: 1. For best practice recommendations, please refer to the Cypress application note entitled System Design Guidelines, which is available at http://www.cypress.com. Cypress Semiconductor Corporation Document #: 38-05392 Rev. *H 8-Mbit (512K x 16) MoBL Functional Description The CY62157DV30 is a high-performance CMOS static RAM organized as 512K words by 16 bits. This device features advanced circuit design to provide ultra-low active current. This is ideal for providing More Battery Life™ ...

Page 2

... Product Portfolio Product Range CY62157DV30L Industrial CY62157DV30LL Industrial CY62157DV30LL Automotive-A CY62157DV30L Automotive-E [ Pin Configuration A15 1 A14 2 A13 3 A12 4 A11 5 A10 DNU CE2 12 DNU 13 BHE 14 BLE 15 A18 16 A17 48-Ball FBGA Pinout Top View BLE I BHE CE I I/O I/O I/O I Vcc A V I/O ...

Page 3

... FBGA and 48TSOPI packages and on the BHE pin of the 44TSOPII package is 15 pF. 2 Document #: 38-05392 Rev. *H Static Discharge Voltage........................................... >2001V (per MIL-STD-883, Method 3015) Latch-up Current...................................................... >200 mA Operating Range Device CY62157DV30L + 0.3V CC(max) CY62157DV30LL + 0.3V CY62157DV30LL Automotive-A –40°C to +85°C CC(max) + 0.3V CY62157DV30L CC(max) Test Conditions V = 2.20V 2.70V ...

Page 4

Thermal Resistance Parameter Description Θ Thermal Resistance JA (Junction to Ambient) Θ Thermal Resistance JC (Junction to Case) AC Test Loads and Waveforms OUTPUT INCLUDING JIG AND SCOPE Parameters R1 R2 ...

Page 5

Switching Characteristics Over the Operating Range Parameter Description Read Cycle t Read Cycle Time RC t Address to Data Valid AA t Data Hold from Address Change OHA t CE LOW and CE HIGH to Data Valid ACE 1 2 ...

Page 6

Switching Waveforms Read Cycle 1 (Address Transition Controlled) ADDRESS DATA OUT PREVIOUS DATA VALID [21, 22] Read Cycle 2 (OE Controlled) ADDRESS ACE BHE/BLE t LZBE OE t LZOE HIGH IMPEDANCE DATA OUT t LZCE ...

Page 7

Switching Waveforms (continued) [19, 23, 24, 25] Write Cycle 1 (WE Controlled) ADDRESS BHE/BLE OE DATA I/O See note 25 t HZOE Write Cycle 2 ( Controlled ADDRESS CE ...

Page 8

Switching Waveforms (continued) Write Cycle 3 (WE Controlled, OE LOW) ADDRESS BHE/BLE DATA I/O See note 25 t HZWE Write Cycle 4 (BHE/BLE Controlled, OE LOW) ADDRESS BHE/BLE t ...

Page 9

Truth Table BHE ...

Page 10

... Ordering Information Speed Ordering Code (ns) 45 CY62157DV30L-45BVI CY62157DV30LL-45ZSXI 55 CY62157DV30LL-55BVI CY62157DV30L-55BVXI CY62157DV30LL-55BVXI CY62157DV30L-55ZXI CY62157DV30LL-55ZSI CY62157DV30L-55ZSXI CY62157DV30LL-55ZSXI CY62157DV30LL-55BVXA CY62157DV30L-55BVXE CY62157DV30L-55ZSXE 70 CY62157DV30LL-70BVI CY62157DV30LL-70BVXI Package Diagrams TOP VIEW A1 CORNER 6.00±0.10 SEATING PLANE C Document #: 38-05392 Rev. *H Package Package Type Diagram 51-85150 48-ball ( mm) FBGA 51-85087 44-pin TSOP II (Pb-free) ...

Page 11

... Document #: 38-05392 Rev. *H © Cypress Semiconductor Corporation, 2006. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress product. Nor does it convey or imply any license under patent or other rights. Cypress products are not warranted nor intended to be used for medical, life support, life saving, critical control or safety applications, unless pursuant to an express written agreement with Cypress ...

Page 12

... Added Pb-Free Automotive Part in the Ordering Information Removed ‘Preliminary’ tag from Automotive Information ZSD Changed the address of Cypress Semiconductor Corporation on Page #1 from “3901 North First Street” to “198 Champion Court” Updated the thermal resistance table Updated the ordering information table and changed the package name ...

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