CY25100SCF Cypress Semiconductor Corp, CY25100SCF Datasheet - Page 2

• Manufacturer Part Number: CY25100SCF
• Manufacturer: Cypress Semiconductor Corp
• Type: Programmable PLL Clock Generatorr

Specifications of CY25100SCF

• Number Of Elements: 1
• Supply Current: 35mA
• Pll Input Freq (min): 8MHz
• Pll Input Freq (max): 166MHz
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: SOIC
• Output Frequency Range: 3 to 200MHz
• Operating Supply Voltage (min): 3.13V
• Operating Supply Voltage (max): 3.45V
• Operating Temperature Classification: Commercial
• Pin Count: 8
• Lead Free Status / Rohs Status: Not Compliant

Pinouts
Pin Description
General Description
The CY25100 is a Spread Spectrum Clock Generator (SSCG) IC
used to reduce EMI found in today’s high speed digital electronic
systems.
The device uses a Cypress proprietary PLL and Spread
Spectrum Clock (SSC) technology to synthesize and modulate
the frequency of the input clock. By frequency modulating the
clock, the measured EMI at the fundamental and harmonic
frequencies are greatly reduced. This reduction in radiated
energy can significantly reduce the cost of complying with
regulatory
time-to-market without degrading system performance.
The CY25100 uses a factory or field-programmable configu-
ration memory array to synthesize output frequency, spread
percentage, crystal load capacitor, reference clock output on/off,
spread spectrum on/off function, and PD#/OE options.
Table 1.
Document #: 38-07499 Rev. *F
Program Value ENTER DATA ENTER DATA ENTER DATA
Pin Function
Pin Name
Pin
1
2
3
4
5
6
7
8
Pin#
Unit
agency
VDD
XOUT
XIN/CLKIN
PD#/OE
VSS
REFCLK
SSCLK
SSON#
XIN and XOUT XIN and XOUT
Frequency
Name
3 and 2
Input
(EMC)
MHz
requirements
Capacitance
3.3V power supply.
Crystal output. Leave this pin floating if external clock is used.
Crystal input or reference clock input.
Power down pin: Active LOW. If PD# = 0, PLL and Xtal are powered down, and outputs are
weakly pulled low.
Output Enable pin: Active HIGH. If OE = 1, SSCLK and REFCLK are enabled. User has the
option of choosing either PD# or OE function.
Power supply ground.
Buffered reference output.
Spread spectrum clock output.
Spread spectrum control. 0 = spread on. 1 = spread off.
Total Xtal
3 and 2
Load
pF
Figure 1. CY25100 8-Pin SOIC/TSSOP
and
Frequency
Output
SSCLK
1
2
MHz
3
4
improve
7
VDD
XIN/CLKIN
PD#/OE
XOUT
0.25% Intervals)
Spread Percent
ENTER DATA
The spread percentage is programmed to either center spread
or down spread with various spread percentages. The range for
center spread is from ±0.25% to ±2.50%. The range for down
spread is from –0.5% to –5.0%. Contact the factory for smaller
or larger spread percentage amounts, if required.
The input to the CY25100 can either be a crystal or a clock
signal. The input frequency range for crystals is 8 to 30 MHz, and
for clock signals is 8 to 166 MHz.
The CY25100 has two clock outputs, REFCLK and SSCLK. The
non spread spectrum REFCLK output has the same frequency
as the input of the CY25100. The frequency modulated SSCLK
output can be programmed from 3 to 200 MHz.
The CY25100 products are available in 8-pin SOIC and TSSOP
packages with commercial and industrial operating temperature
ranges.
(0.5% – 5%,
REFCLK
SSCLK
SSON#
SSCLK
VSS
%
7
8
6
7
5
Description
ENTER DATA
Reference
REFOUT
On or Off
Output
6
Select PD# or OE
Power down or
Output Enable
ENTER DATA
PD#/OE
4
CY25100
Modulation
Page 2 of 13
Frequency
SSCLK
31.5
kHz
7
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