IMIB9948CA Cypress Semiconductor Corp, IMIB9948CA Datasheet - Page 3

• Manufacturer Part Number: IMIB9948CA
• Manufacturer: Cypress Semiconductor Corp

Specifications of IMIB9948CA

• Lead Free Status / Rohs Status: Not Compliant

Document #: 38-07079 Rev. *D
Maximum Ratings
Maximum Input Voltage Relative to V
Maximum Input Voltage Relative to V
Storage Temperature: ................................–65 C to + 150 C
Operating Temperature: .................................-40°C to +85°C
Maximum ESD Protection.............................................. 2 KV
Maximum Power Supply: ................................................5.5V
Maximum Input Current:
DC Parameters:
Notes:
V
V
I
I
V
V
V
V
I
C
2.
3.
4.
5.
Parameter
IL
IH
DD
IL
IH
PP
CMR
OL
OH
in
Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required
Inputs have pull-up resistors that effect input current, PECL_CLK# has a pull-down resistor.
The V
range and the input lies within the V
Driving series or parallel terminated 50
CMR
is the difference from the most positive side of the differential input signal. Normal operation is obtained when the “High” input is within the V
Input Low Voltage
Input High Voltage
Input Low Current (@V
Input High Current (@V
Peak-to-Peak Input Voltage
PECL_CLK
Common Mode Range PECL_CLK
Output Low Voltage
Output High Voltage
Quiescent Supply Current
Input Capacitance
V
DDC
[2]
Description
= 3.3V ±10%, V
PP
specification.
(or 50 to V
IL
SS
DD
IL
= V
: ............ V
: ............. V
=V
DD
SS
DD
)
)
DD
= 3.3V ±10%, T
/2) transmission lines.
DD
SS
PECL_CLK, Single Ended
+ 0.3V
PECL_CLK, Single Ended
All other inputs
All other inputs
Note [3]
Note [4]
I
I
All V
– 0.3V
20 mA
OL
OH
= 20 mA, Note [5]
= –20 mA, V
DDC
A
and V
= –40°C to +85°C
This device contains circuitry to protect the inputs against
damage due to high static voltages or electric field; however,
precautions should be taken to avoid application of any volt-
age higher than the maximum rated voltages to this circuit. For
proper operation, V
range:
V
Unused inputs must always be tied to an appropriate logic volt-
age level (either V
Conditions
SS
DD
DDC
< (V
= 3.3V, Note [5]
in
or V
out
) < V
SS
in
or V
and V
DD
DD
V
DD
2.135
).
out
Min.
1.49
V
300
2.0
2.5
SS
– 2.0
should be constrained to the
Typ.
1
V
DD
1.825
Max.
–100
1000
2.42
V
100
0.8
0.4
DD
2
4
B9948
– 0.6
Page 3 of 6
CMR
Unit
mV
mA
µA
µA
pF
V
V
V
V
V