CY7C1069AV33-12ZC Cypress Semiconductor Corp, CY7C1069AV33-12ZC Datasheet - Page 11

• Manufacturer Part Number: CY7C1069AV33-12ZC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C1069AV33-12ZC

• Density: 16Mb
• Access Time (max): 12ns
• Sync/async: Asynchronous
• Architecture: Not Required
• Clock Freq (max): Not RequiredMHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 21b
• Package Type: TSOP-II
• Operating Temp Range: 0C to 70C
• Number Of Ports: 1
• Supply Current: 260mA
• Operating Supply Voltage (min): 3V
• Operating Supply Voltage (max): 3.6V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 54
• Word Size: 8b
• Number Of Words: 2M
• Lead Free Status / Rohs Status: Not Compliant

Document History Page
Document #: 38-05255 Rev. *G
Document Title: CY7C1069AV33 2M x 8 Static RAM
Document Number: 38-05255
REV.
*C
*D
*G
*A
*B
*E
*F
**
ECN NO.
2784946
113724
117060
117990
120385
124441
403984
492137
Submission
10/12/2009
See ECN
See ECN
03/27/02
07/31/02
08/30/02
11/13/02
2/25/03
Date
VKN/PYRS Updated template
Orig. of
Change
MEG
DFP
DFP
DFP
NXR
NXR
NSL
New Data Sheet
Removed 15-ns bin
Added 8-ns bin
Changing I
t
Load Cap Comment changed (for Tx line load)
t
Changed some 8-ns bin #'s (t
Removed hz < lz comments
Final Data Sheet
Added note 4 to “AC Test Loads and Waveforms” and note 7 to t
Updated Input/Output Caps (for 48BGA only) to 8 pf/10 pf and for the 54-pin
TSOP to 6/8 pf
Changed ISB1 from 100 mA to 70 mA
Shaded the 48fBGA product offering information
Changed the Logic Block Diagram On page # 1
Added notes under Pin Configuration
Changed the Package diagram of 51-85162 from Rev *A to Rev *D
Changed 48-Ball FBGA to 60-Ball FBGA in Pin Configuration
Updated the Ordering Information
Removed 8 ns speed bin from product offering
Changed the description of I
Current in DC Electrical Characteristics table
Updated the Ordering Information
Corrected typo in footnote 9
Updated Ordering Information table
power
SD
changed to 5.5 ns for the 10-ns bin
changed from 1 μs to 1 ms
CC
for 8, 10, 12 bins
Description of Change
IX
HZ
from Input Load Current to Input Leakage
, t
DOE
, t
DBE
)
CY7C1069AV33
pu
and t
Page 11
pd
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