CY7C1061AV33-10ZC Cypress Semiconductor Corp, CY7C1061AV33-10ZC Datasheet - Page 3
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CY7C1061AV33-10ZC
Manufacturer Part Number
CY7C1061AV33-10ZC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet
1.CY7C1061AV33-10ZC.pdf
(11 pages)
Specifications of CY7C1061AV33-10ZC
Density
16Mb
Access Time (max)
10ns
Sync/async
Asynchronous
Architecture
Not Required
Clock Freq (max)
Not RequiredMHz
Operating Supply Voltage (typ)
3.3V
Address Bus
20b
Package Type
TSOP-II
Operating Temp Range
0C to 70C
Number Of Ports
1
Supply Current
275mA
Operating Supply Voltage (min)
3V
Operating Supply Voltage (max)
3.6V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
54
Word Size
16b
Number Of Words
1M
Lead Free Status / Rohs Status
Not Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
CY7C1061AV33-10ZC
Manufacturer:
ALLEGRO
Quantity:
2 300
Document #: 38-05256 Rev. *F
Maximum Ratings
(Above which the useful life may be impaired. For user guide-
lines, not tested.)
Storage Temperature ................................. –65°C to +150°C
Ambient Temperature with
Power Applied............................................. –55°C to +125°C
Supply Voltage on V
DC Voltage Applied to Outputs
in High-Z State
DC Electrical Characteristics
Capacitance
AC Test Loads and Waveforms
Notes:
V
V
V
V
I
I
I
I
I
C
C
3. V
4. Tested initially and after any design or process changes that may affect these parameters.
5. Valid SRAM operation does not occur until the power supplies have reached the minimum operating V
Parameter
IX
OZ
CC
SB1
SB2
OH
OL
IH
IL
IN
OUT
OUTPUT
minimum operating V
IL
Parameter
(min.) = –2.0V for pulse durations of less than 20 ns.
Output HIGH Voltage
Output LOW Voltage
Input HIGH Voltage
Input LOW Voltage
Input Leakage Current GND < V
Output Leakage Current GND < V
V
Supply Current
Automatic CE
Power-down Current
—TTL Inputs
Automatic CE
Power-down Current
—CMOS Inputs
[3]
CC
[4]
Z
....................................–0.5V to V
0
Operating
= 50Ω
Description
DD
CC
Rise time > 1V/ns
Input Capacitance
I/O Capacitance
, normal SRAM operation can begin including reduction in V
to Relative GND
(a)
GND
3.3V
Description
30 pF* * Capacitive Load consists of all com-
[3]
50Ω
V
V
V
f = f
CE
V
V
CE
Max. V
CE > V
V
or V
Over the Operating Range
ponents of the test environment.
CC
CC
CC
IN
IN
IN
[3]
[5]
2
2
MAX
> V
< V
> V
IN
.... –0.5V to +4.6V
= Min., I
= Min., I
= Max.,
<= V
<= 0.3V
V
10%
TH
< 0.3V, f = 0
CC
CC
IH
IL
CC
90%
ALL INPUT PULSES
= 1/t
= 1.5V
OUT
, f = f
I
Test Conditions
IL,
,
or
< V
– 0.3V,
– 0.3V,
T
Max. V
A
CC
OH
OL
< V
RC
CC
= 25°C, f = 1 MHz, V
MAX
(c)
+ 0.5V
= 8.0 mA
CC
= –4.0 mA
, Output Disabled
CC
Test Conditions
Commercial
Industrial
Commercial/
Industrial
, CE > V
DC Input Voltage
Current into Outputs (LOW)......................................... 20 mA
Operating Range
Commercial
Industrial
DD
IH
90%
CC
to the data retention (V
Range
10%
Fall time:
> 1V/ns
= 3.3V
Min.
–0.3
2.4
2.0
–1
–1
DD
OUTPUT
[3]
–10
(3.0V). As soon as 1ms (T
................................ –0.5V to V
INCLUDING
JIG AND
SCOPE
V
3.3V
CC
–40°C to +85°C
CCDR
TSOP II
Max.
Temperature
0°C to +70°C
275
275
0.4
0.8
+1
+1
70
50
+ 0.3
Ambient
6
8
, 2.0V) voltage.
5 pF*
(b)
CY7C1061AV33
R1 317 Ω
Min.
–0.3
2.4
2.0
–1
–1
FBGA
power
10
–12
8
V
) after reaching the
CC
Max.
3.3V ± 0.3V
260
260
0.4
0.8
351Ω
+1
+1
70
50
R2
Page 3 of 11
+ 0.3
V
CC
CC
Unit
+ 0.5V
pF
pF
Unit
mA
mA
mA
mA
µA
µA
V
V
V
V