CY7C0852V-133AC Cypress Semiconductor Corp, CY7C0852V-133AC Datasheet - Page 2

• Manufacturer Part Number: CY7C0852V-133AC
• Manufacturer: Cypress Semiconductor Corp

Specifications of CY7C0852V-133AC

• Density: 4Mb
• Access Time (max): 4.4ns
• Sync/async: Synchronous
• Architecture: SDR
• Clock Freq (max): 133MHz
• Operating Supply Voltage (typ): 3.3V
• Address Bus: 17b
• Package Type: TQFP
• Operating Temp Range: 0C to 70C
• Number Of Ports: 2
• Supply Current: 300mA
• Operating Supply Voltage (min): 3.135V
• Operating Supply Voltage (max): 3.465V
• Operating Temperature Classification: Commercial
• Mounting: Surface Mount
• Pin Count: 176
• Word Size: 36b
• Number Of Words: 128K
• Lead Free Status / Rohs Status: Not Compliant

Logic Block Diagram
Note
Document #: 38-06070 Rev. *H
1. 9M device has 18 address bits, 4M device has 17 address bits, 2M device has 16 address bits, and 1M device has 15 address bits.
OE
R/W
B0
B1
B2
B3
CE
CE
DQ
DQ
DQ
DQ
CNTINT
A
CNT/MSK
ADS
CNTEN
CNTRST
CLK
L
L
L
L
L
0L
1L
0L
L
27L
18L
9L
0L
–A
–DQ
–DQ
L
L
–DQ
–DQ
17L
L
17L
8L
L
35L
26L
L
L
INT
9
9
9
9
18
L
Interrupt
Mask Register
Logic
[1]
Mirror Reg
Counter/
Register
Address
Addr.
Read
Back
MRST
Control
I/O
Address
Decode
Reset
Logic
Dual-Ported
RAM Array
True
TMS
TDI
TCK
Address
Decode
JTAG
Control
I/O
TDO
CY7C0850AV, CY7C0851AV
CY7C0852AV, CY7C0853AV
Mask Register
Mirror Reg
Counter/
Register
Address
Addr.
Read
Back
Interrupt
Logic
18
INT
9
9
9
9
R
CNT/MSK
CNTRST
DQ
DQ
CNTINT
DQ
DQ
A
CNTEN
27R
18R
0R
9R
Page 2 of 32
CLK
0R
ADS
–DQ
–DQ
–DQ
–A
–DQ
R/W
CE
CE
OE
B0
B1
B2
B3
17R
R
R
R
R
0R
1R
35R
26R
17R
R
R
R
R
R
R
8R
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