CY7C0851V-133AC Cypress Semiconductor Corp, CY7C0851V-133AC Datasheet - Page 25

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CY7C0851V-133AC

Manufacturer Part Number
CY7C0851V-133AC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C0851V-133AC

Density
2Mb
Access Time (max)
4.4ns
Sync/async
Synchronous
Architecture
SDR
Clock Freq (max)
133MHz
Operating Supply Voltage (typ)
3.3V
Address Bus
16b
Package Type
TQFP
Operating Temp Range
0C to 70C
Number Of Ports
2
Supply Current
300mA
Operating Supply Voltage (min)
3.135V
Operating Supply Voltage (max)
3.465V
Operating Temperature Classification
Commercial
Mounting
Surface Mount
Pin Count
176
Word Size
36b
Number Of Words
64K
Lead Free Status / Rohs Status
Not Compliant

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Switching Waveforms
Notes
Document #: 38-06070 Rev. *H
39. CE
40. This timing is valid when one port is writing, and other port is reading the same location at the same time. If t
41. If t
> minimum specified value, then R_Port is Read the most recent data (written by L_Port) (t
CLK
L_PORT
ADDRESS
R/W
L_PORT
DATA
CLK
R_PORT
ADDRESS
R/W
R_PORT
DATA
CCS
0
= OE = ADS = CNTEN = B0 – B3 = LOW; CE
L
L
R
R
< minimum specified value, then R_Port is Read the most recent data (written by L_Port) only (2 * t
IN
OUT
t
CKHZ
t
CH2
t
t
CH2
CYC2
Figure 21. Left_Port (L_Port) Write to Right_Port (R_Port) Read
t
t
CYC2
CL2
t
SW
(continued)
t
t
SD
SA
t
CL2
D
A
n
n
1
t
HA
= CNTRST = MRST = CNT/MSK = HIGH.
t
CCS
t
SA
t
HW
t
HD
A
n
t
HA
t
CKLZ
t
CYC2
DC
t
CD2
+ t
CD2
) after the rising edge of R_Port's clock.
CY7C0850AV, CY7C0851AV
CY7C0852AV, CY7C0853AV
CYC2
CCS
Q
+ t
n
is violated, indeterminate data is Read out.
CD2
) after the rising edge of R_Port's clock. If t
[39, 40, 41]
Page 25 of 32
CCS
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