TE28F800C3TA110 Micron Technology Inc, TE28F800C3TA110 Datasheet - Page 38

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TE28F800C3TA110

Manufacturer Part Number
TE28F800C3TA110
Description
Manufacturer
Micron Technology Inc
Datasheet

Specifications of TE28F800C3TA110

Density
8Mb
Access Time (max)
110ns
Interface Type
Parallel
Boot Type
Top
Address Bus
19b
Operating Supply Voltage (typ)
3/3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
16b
Number Of Words
512K
Supply Current
18mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
TE28F800C3TA110
Manufacturer:
TI
Quantity:
201
Table 20: Reset Specifications
Figure 13: Reset Operations Waveforms
8.6
Datasheet
38
t
t
Notes:
1.
2.
3.
PLRH1
PLRH2
Symbol
If t
If RP# is asserted while a Block Erase or Word Program operation is not executing, the reset will
complete within 100 ns.
Sampled, but not 100% tested.
PLPH
RP# Low to Reset during Block Erase
RP# Low to Reset during Program
is < 100 ns the device may still reset but this is not guaranteed.
Power Supply Decoupling
Flash memory power-switching characteristics require careful device decoupling.
System designers should consider the following three supply current issues:
Transient current magnitudes depend on the device outputs’ capacitive and inductive
loading. Two-line control and proper decoupling capacitor selection will suppress these
transient voltage peaks. Each flash device should have a 0.1 µF ceramic capacitor
connected between each V
frequency, inherently low-inductance capacitors should be placed as close as possible
to the package leads.
• Standby current levels (I
• Read current levels (I
• Transient peaks produced by falling and rising edges of CE#.
Parameter
(A ) R e s e t d u rin g R e a d M o d e
(B ) R e s e t d u rin g P ro g ra m o r B lo c k E ra s e ,
(C ) R e s e t P ro g ra m o r B lo c k E ra s e ,
R P # (P )
R P # (P )
R P # (P )
V
V
V
V
V
V
IH
IL
IH
IH
IL
IL
CCR
CC
CCS
)
and GND, and between its V
t
C o m p le te
t
P L P H
)
P L R H
A b o rt
t
t
t
P L P H
P L P H
P L R H
C o m p le te
P o w e r-
D o w n
D e e p
A b o rt
t
t
t
P H Q V
P H W L
P H E L
t
Min
V
P L P H
CC
t
t
t
t
t
t
P H Q V
P H W L
P H E L
2.7 V – 3.6 V
P H Q V
P H W L
P H E L
>
t
P L P H
t
P L R H
<
Max
t
22
12
P L R H
PP
and VSS. These high-
Unit
µs
µs
C3 Discrete
March 2008
Notes
290645-24
3
3

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