LH28F320BFHE-PBTL60 Sharp Electronics, LH28F320BFHE-PBTL60 Datasheet - Page 13

no-image

LH28F320BFHE-PBTL60

Manufacturer Part Number
LH28F320BFHE-PBTL60
Description
Manufacturer
Sharp Electronics
Datasheet

Specifications of LH28F320BFHE-PBTL60

Cell Type
NOR
Density
32Mb
Access Time (max)
60ns
Interface Type
Parallel
Boot Type
Bottom
Address Bus
21b
Operating Supply Voltage (typ)
3.3V
Operating Temp Range
-40C to 85C
Package Type
TSOP
Program/erase Volt (typ)
11.7 to 12.3V
Sync/async
Asynchronous
Operating Temperature Classification
Industrial
Operating Supply Voltage (min)
2.7V
Operating Supply Voltage (max)
3.6V
Word Size
16b
Number Of Words
2M
Supply Current
25mA
Mounting
Surface Mount
Pin Count
48
Lead Free Status / Rohs Status
Not Compliant
6. Either 40H or 10H are recognized by the CUI (Command User Interface) as the program setup.
7. Following the third bus cycle, input the program sequential address and write data of "N" times. Finally, input the any
8. If the program operation in one partition is suspended and the erase operation in other partition is also suspended, the
9. Full chip erase and OTP program operations can not be suspended. The OTP Program command can not be accepted
10. Following the Clear Block Lock Bit command, block which is not locked-down is unlocked when WP#/ACC is V
11. Commands other than those shown above are reserved by SHARP for future device implementations and should not be
valid address within the target block to be programmed and the confirm command (D0H). Refer to Appendix of
LH28F320BF series for details.
suspended program operation should be resumed first, and then the suspended erase operation should be resumed next.
while the block erase operation is being suspended.
When WP#/ACC is V
configuration.
used.
IH
, lock-down bit is disabled and the selected block is unlocked regardless of lock-down
LHF32FB4
Rev. 2.44
11
IL
.

Related parts for LH28F320BFHE-PBTL60