LH28F016SCT-L90 Sharp Electronics, LH28F016SCT-L90 Datasheet - Page 39
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LH28F016SCT-L90
Manufacturer Part Number
LH28F016SCT-L90
Description
Manufacturer
Sharp Electronics
Datasheet
1.LH28F016SCT-L90.pdf
(55 pages)
Specifications of LH28F016SCT-L90
Cell Type
NOR
Density
16Mb
Access Time (max)
90ns
Interface Type
Parallel
Boot Type
Not Required
Address Bus
21b
Operating Supply Voltage (typ)
3.3/5V
Operating Temp Range
0C to 70C
Package Type
TSOP
Program/erase Volt (typ)
3.3/5/12V
Sync/async
Asynchronous
Operating Temperature Classification
Commercial
Operating Supply Voltage (min)
2.7/4.5V
Operating Supply Voltage (max)
3.6/5.5V
Word Size
8b
Number Of Words
2M
Supply Current
50mA
Mounting
Surface Mount
Pin Count
40
Lead Free Status / Rohs Status
Not Compliant
sharp
NOTES:
1. In systems where CE# defines the write pulse width (within a longer WE# timing waveform), all setup, hold, and
2. Sampled, not 100% tested.
3. Refer to Table 4 for valid A
4. V
5. See Ordering Information for device speeds (valid operational combinations).
6. See Transient Input/Output Reference Waveform and Transient Equivalent Testing Load Circuit (High Seed
7. See Transient Input/Output Reference Waveform and Transient Equivalent Testing Load Circuit (Standard
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
AVAV
PHEL
WLEL
ELEH
PHHEH
VPEH
AVEH
DVEH
EHDX
EHAX
EHWH
EHEL
EHRL
EHGL
QVVL
QVPH
Sym.
inactive WE# times should be measured relative to the CE# waveform.
byte write, or lock-bit configuration success (SR.1/3/4/5=0).
Configuration) for testing characteristics.
Configuration) for testing characteristics.
PP
should be held at V
Write Cycle Time
RP# High Recovery to CE# Going Low
WE# Setup to CE# Going Low
CE# Pulse Width
RP# V
V
Address Setup to CE# Going High
Data Setup to CE# Going High
Data Hold from CE# High
Address Hold from CE# High
WE# Hold from CE# High
CE# Pulse Width High
CE# High to RY/BY# Going Low
Write Recovery before Read
V
RP# V
High
PP
PP
Setup to CE# Going High
Hold from Valid SRD, RY/BY# High
Versions
HH
HH
Setup to CE# Going High
Hold from Valid SRD, RY/BY#
Parameter
(5)
PPH1/2/3
IN
and D
(and if necessary RP# should be held at V
V
CC
IN
=5V±0.5V, 5V±0.25V, T
for block erase, byte write, or lock-bit configuration.
V
V
CC
CC
=5V±0.25V LH28F016SC-L90
=5V±0.5V
LHF16CZA
Notes
2,4
2,4
2
2
2
3
3
A
=0°C to +70°C
Min.
100
100
90
50
40
40
25
1
0
5
5
0
0
0
0
Max.
HH
90
) until determination of block erase,
(6)
Min.
100
100
100
LH28F016SC-
50
40
40
25
1
0
5
5
0
0
0
0
L100
(7)
Max.
90
Rev. 1.2
Unit
ns
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
36