AM29DL800BT-70WBC Spansion Inc., AM29DL800BT-70WBC Datasheet - Page 5

• Manufacturer Part Number: AM29DL800BT-70WBC
• Manufacturer: Spansion Inc.

Specifications of AM29DL800BT-70WBC

• Cell Type: NOR
• Density: 8Mb
• Access Time (max): 70ns
• Interface Type: Parallel
• Boot Type: Top
• Address Bus: 20/19Bit
• Operating Supply Voltage (typ): 3.3V
• Operating Temp Range: 0C to 70C
• Package Type: FBGA
• Program/erase Volt (typ): 2.7 to 3.6V
• Sync/async: Asynchronous
• Operating Temperature Classification: Commercial
• Operating Supply Voltage (min): 2.7V
• Operating Supply Voltage (max): 3.6V
• Word Size: 8/16Bit
• Number Of Words: 1M/512K
• Supply Current: 12mA
• Mounting: Surface Mount
• Pin Count: 48
• Lead Free Status / Rohs Status: Not Compliant

TABLE OF CONTENTS
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 5
Pin Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 8
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 9
Command Definitions . . . . . . . . . . . . . . . . . . . . . 16
Write Operation Status . . . . . . . . . . . . . . . . . . . . . 21
March 17, 2009 21519C5
Special Handling Instructions for FBGA Package .................... 6
Word/Byte Configuration .......................................................... 9
Requirements for Reading Array Data ..................................... 9
Writing Commands/Command Sequences .............................. 9
Simultaneous Read/Write Operations with Zero Latency ....... 10
Standby Mode ........................................................................ 10
Automatic Sleep Mode ........................................................... 10
RESET#: Hardware Reset Pin ............................................... 11
Output Disable Mode .............................................................. 11
Autoselect Mode ..................................................................... 13
Sector Protection/Unprotection ............................................... 14
Temporary Sector Unprotect .................................................. 14
Hardware Data Protection ...................................................... 16
Reading Array Data ................................................................ 16
Reset Command ..................................................................... 16
Autoselect Command Sequence ............................................ 16
Byte/Word Program Command Sequence ............................. 17
Chip Erase Command Sequence ........................................... 18
Sector Erase Command Sequence ........................................ 18
Erase Suspend/Erase Resume Commands ........................... 19
Command Definitions ............................................................. 20
DQ7: Data# Polling ................................................................. 21
RY/BY#: Ready/Busy# ........................................................... 22
DQ6: Toggle Bit I .................................................................... 22
DQ2: Toggle Bit II ................................................................... 22
Table 1. Am29DL800B Device Bus Operations ................................9
Table 2. Am29DL800BT Top Boot Sector Architecture ..................12
Table 3. Am29DL800BB Bottom Boot Sector Architecture .............13
Table 4. Am29DL800B Autoselect Codes (High Voltage Method) ..14
Figure 1. Temporary Sector Unprotect Operation........................... 14
Figure 2. In-System Sector Protect/Unprotect Algorithms .............. 15
Figure 3. Program Operation .......................................................... 18
Figure 4. Erase Operation............................................................... 19
Table 5. Am29DL800B Command Definitions ................................20
Figure 5. Data# Polling Algorithm ................................................... 21
D A T A
Am29DL800B
S H E E T
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 25
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . 25
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 26
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Key to Switching Waveforms . . . . . . . . . . . . . . . 28
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 29
Erase and Programming Performance . . . . . . . 39
Latchup Characteristics . . . . . . . . . . . . . . . . . . . . 39
TSOP and SO Pin Capacitance . . . . . . . . . . . . . . 39
Data Retention. . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 40
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 43
Reading Toggle Bits DQ6/DQ2 ............................................... 22
DQ5: Exceeded Timing Limits ................................................ 23
DQ3: Sector Erase Timer ....................................................... 23
Erase and Program Operations .............................................. 32
Alternate CE# Controlled Erase/Program Operations ............ 37
TS 048—48-Pin Standard TSOP ............................................ 40
FBB048 —48-Ball Fine-Pitch Ball Grid Array (FBGA),
6 x 9 mm package .................................................................. 41
SO 044—44-Pin Small Outline .............................................. 42
Figure 6. Toggle Bit Algorithm........................................................ 23
Table 6. Write Operation Status ......................................................24
Figure 7. Maximum Negative Overshoot Waveform ..................... 25
Figure 8. Maximum Positive Overshoot Waveform....................... 25
Figure 9. I
Sleep Currents) .............................................................................. 27
Figure 10. Typical I
Figure 11. Test Setup.................................................................... 28
Table 7. Test Specifications ........................................................... 28
Figure 12. Input Waveforms and Measurement Levels ................. 28
Figure 13. Read Operation Timings ............................................... 29
Figure 14. Reset Timings ............................................................... 30
Figure 15. BYTE# Timings for Read Operations............................ 31
Figure 16. BYTE# Timings for Write Operations............................ 31
Figure 17. Program Operation Timings.......................................... 33
Figure 18. Chip/Sector Erase Operation Timings .......................... 33
Figure 19. Back-to-Back Read/Write Cycle Timings ...................... 34
Figure 20. Data# Polling Timings (During Embedded Algorithms). 34
Figure 21. Toggle Bit Timings (During Embedded Algorithms)...... 35
Figure 22. DQ2 vs. DQ6................................................................. 35
Figure 23. Temporary Sector Unprotect Timing Diagram .............. 36
Figure 24. Sector Protect/Unprotect Timing Diagram .................... 36
Figure 25. Alternate CE# Controlled Erase/Program
Operation Timings.......................................................................... 38
CC1
Current vs. Time (Showing Active and Automatic
CC1
vs. Frequency ........................................... 27
3