UPD16431AGC-7ET CALIFORNIA EASTERN LABS, UPD16431AGC-7ET Datasheet
UPD16431AGC-7ET
Specifications of UPD16431AGC-7ET
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UPD16431AGC-7ET Summary of contents
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To our customers, Old Company Name in Catalogs and Other Documents st On April 1 , 2010, NEC Electronics Corporation merged with Renesas Technology Corporation, and Renesas Electronics Corporation took over all the business of both companies. Therefore, although the ...
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All information included in this document is current as of the date this document is issued. Such information, however, is subject to change without any prior notice. Before purchasing or using any Renesas Electronics products listed herein, please confirm ...
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LCD CONTROLLER/DRIVER DESCRIPTION The µ PD16431A is an LCD controller/driver that enables display of segment type LCDs of 1/2, 1/3, or 1/4 duty cycle. This controller/driver has 56 segment output lines of which eight can also be ...
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BLOCK DIAGRAM ................................................................................................................................ 3 2. PIN CONFIGURATION .......................................................................................................................... 4 3. PIN DESCRIPTIONS ............................................................................................................................. 5 4. PIN FUNCTION...................................................................................................................................... 6 4.1 Configuration of Shift Register.......................................................................................................................... 6 4.2 Configuration of Output Latch........................................................................................................................... 6 4.3 Key Matrix Configuration .................................................................................................................................. 7 4.4 Configuration of ...
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BLOCK DIAGRAM Key counter Write address STB DATA I/O control SCK 8-bit shift register KEY REQ LED driver Segment driver 56 Level shifter (56) 56 Selector circuit 56 2 Output latch ( Read address ...
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PIN CONFIGURATION • µ µ µ µ PD16431AGC-7ET 60 61 SEG 37 SEG 38 SEG 39 SEG 40 SEG 41 SEG 42 SEG 43 SEG 44 SEG 45 SEG 46 SEG 47 SEG 48 SEG /LED 49 1 SEG ...
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PIN DESCRIPTIONS Symbol Pin Name SEG /KS to Segment/key source 1 1 SEG / SEG /SEG Segment 9 48 SEG /LED to Segment/LED 49 1 SEG /LED 56 8 COM to COM Common 1 4 SCK Shift ...
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PIN FUNCTION 4.1 Configuration of Shift Register Two shift registers, an 8-bit command register and a 56-bit display register, are provided. The first 8 bits of input data are recognized as a command and are sent to the command ...
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Key Matrix Configuration An example of key matrix configurations is shown below. (1) When pressing three or more times is assumed: In this configuration assumed that three or more switches are pressed simultaneously. # Note, however, that ...
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If diode A is not available, not only the key data may not be read correctly, but the LCD display may be affected or IC may be damaged or deteriorated. For example, if SW1 and SW2 are ON and KS ...
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Configuration of Key Data Latch The key data is latched as illustrated below and is read by a read command, starting from the most significant bit. Key data is read once a frame and latched when coinciding with the ...
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COMMAND A command sets a display mode and a status. The first 1 byte input after the STB pin has fallen is regarded as a command. If the STB pin is made low while a command/data is transferred, serial ...
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Status command This command sets a data write/read mode, turns ON/OFF display, and sets a latch address. MSB Value when power is applied LSB x :Don't care b1 ...
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OUTPUT SELECT VOLTAGE (1) COM Parameter Power supply When selected Internal External When not selected Internal External When key scanned Internal External When selected Internal External When not selected Internal External When key scanned Internal External (2) SEG Parameter ...
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OUTPUT WAVEFORM 7.1 1/2 Duty (1/2 bias) V LCD V COM LC2 LCD COM V 2 LC2 LCD V LC2 SEG LCD V SEG LC2 ...
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Key scan period (K0) expansion V LCD COM V 1 LC2 LCD SEG V 1 LC2 LCD V SEG LC2 LCD SEG V 3 LC2 LCD ...
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Key scan period (K1) expansion V LCD COM V 1 LC2 LCD SEG to SEG , LC2 SEG to SEG LCD V SEG LC2 ...
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Duty (1/3 bias) V LCD V LC1 COM V 1 LC2 V LC3 LCD V LC1 V LC2 COM 2 V LC3 LCD V LC1 V COM LC2 3 V LC3 V ...
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Key scan period (K0) expansion COM 1 SEG 1 SEG 2 SEG 3 SEG 4 SEG to SEG 5 48 Remark LCD V LC1 V LC2 V LC3 V EE ...
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Key scan period (K1) expansion 0 V LCD V LC1 COM V 1 LC2 V LC3 LCD V LC1 SEG to SEG , LC2 SEG to SEG LC3 V EE ...
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Key scan period (K2) expansion COM 1 SEG to SEG LCD V LC1 V LC2 V LC3 LCD V LC1 V LC2 V LC3 V ...
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Duty (1/3 bias LCD V LC1 V COM LC2 1 V LC3 LCD V LC1 V COM LC2 2 V LC3 LCD V LC1 COM V 3 ...
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Key scan period (K0) expansion 3 V LCD V LC1 COM V 1 LC2 V LC3 LCD V LC1 SEG V 1 LC2 V LC3 LCD V LC1 SEG V 2 LC2 V ...
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Key scan period (K1) expansion 0 V LCD V LC1 V COM LC2 1 V LC3 LCD V LC1 SEG to SEG , LC2 SEG to SEG LC3 V EE ...
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Key scan period (K2) expansion COM 1 SEG to SEG 1 48 (4) Key scan period (K3) expansion V LCD V LC1 V LC2 COM V 1 LC3 LCD V LC1 V SEG to SEG LC2 ...
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Serial Communication Format (1) Receive (command/data write) STB DATA b7 SCK 1 (2) Transmit (command/data read) STB DATA b7 b6 SCK 1 2 Data read command set ...
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APPLICATION 8.1 Example of Initial Setting + Display Data Write Parameter STB b7 b6 Start H Set display command Status command Display data Display data 7 ...
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Example of Display Data Write (Rewrite, 1/4) Parameter STB Start H Status command Display data Display data Status command ...
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ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings (T = 25° Parameter Symbol Logic supply voltage V DD Logic input voltage V IN Logic output voltage (DATA) V OUT LCD drive supply voltage V LCD LCD drive supply input voltage ...
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Switching Characteristics (Unless otherwise specified kΩ Ω Ω Ω 150 pF Parameter Symbol Oscillation frequency f OSC Propagation delay time t PZL t PLZ SYNC delay time t DSYNC Timing Requirements ...
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Switching Characteristic Waveform OSC STB HSTBK t WLK V IH SCK DATA V IL SYNC timing (master) 1 frame f OSC SYNC Internal reset SCK V IL DATA ...
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APPLICATION CIRCUIT EXAMPLE (with LED, 1/4 duty, 1/3 bias DATA SCK To STB r microcompute KEYREQ OE V LCD/LED SYNC OSC OSC OUT LCD ...
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PACKAGE DRAWING 80-PIN PLASTIC LQFP (14x14 NOTE Each lead centerline is located within 0. its true position (T.P.) at maximum material condition detail of lead end ...
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RECOMMENDED SOLDERING CONDITIONS The µ PD16431A should be soldered and mounted under the following recommended conditions. For the details of the recommended soldering conditions, refer to the document Semiconductor Device Mounting Technology Manual(C10535E). For soldering methods and conditions other ...
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Data Sheet S15129EJ3V0DS µ µ µ µ PD16431A 33 ...
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Data Sheet S15129EJ3V0DS µ µ µ µ PD16431A ...
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NOTES FOR CMOS DEVICES 1 PRECAUTION AGAINST ESD FOR SEMICONDUCTORS Note: Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and ultimately degrade the device operation. Steps must be taken to stop generation ...
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REFERENCE DOCUMENTS NEC Semiconductor Device Reliability/Quality Control System Semiconductor Device Mounting Technology Manual • The information in this document is current as of December, 2001. The information is subject to change without notice. For actual design-in, refer to the latest ...