TC4069UBF Toshiba, TC4069UBF Datasheet

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TC4069UBF

Manufacturer Part Number
TC4069UBF
Description
Manufacturer
Toshiba
Datasheet

Specifications of TC4069UBF

Logical Function
Inverter
Logic Family
4000
Number Of Elements
6
High Level Output Current
-4mA
Low Level Output Current
4mA
Propagation Delay Time
110ns
Operating Supply Voltage (typ)
3.3/5/9/12/15V
Package Type
SOP
Operating Temp Range
-40C to 85C
Pin Count
14
Quiescent Current
1uA
Technology
CMOS
Mounting
Surface Mount
Operating Temperature Classification
Industrial
Operating Supply Voltage (max)
18V
Operating Supply Voltage (min)
3V
Lead Free Status / Rohs Status
Not Compliant

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TC4069UB Hex Inverter
circuit is composed of a single stage inverter, this is suitable for
the applications of CR oscillator circuits, crystal oscillator circuits
and linear amplifiers in addition to its application as inverters.
has been reduced.
Pin Assignment
Circuit Diagram
TC4069UB contains six circuits of inverters. Since the internal
Because of one stage gate configuration, the propagation time
1/6 TC4069UB
V
INPUT
O1
O2
O3
SS
I1
I2
I3
TC4069UBP,TC4069UBF,TC4069UBFN,TC4069UBFT
1
2
3
4
5
6
7
(top view)
TOSHIBA CMOS Digital Integrated Circuit Silicon Monolithic
V
DD
14
13
12
11
10
9
8
V
SS
V
I6
O6
I5
O5
I4
O4
DD
OUTPUT
1
TC4069UBP/UBF/UBFN/UBFT
Note: xxxFN (JEDEC SOP) is not available in
W
DIP14-P-300-2.54
SOP14-P-300-1.27A
SOL14-P-150-1.27
TSSOP14-P-0044-0.65A
TC4069UBP
TC4069UBF
TC4069UBFN
TC4069UBFT
eight
Japan.
: 0.96 g (typ.)
: 0.18 g (typ.)
: 0.12 g (typ.)
: 0.06 g (typ.)
2007-10-01

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TC4069UBF Summary of contents

Page 1

... Because of one stage gate configuration, the propagation time has been reduced. Pin Assignment (top view) Circuit Diagram 1/6 TC4069UB INPUT OUTPUT TC4069UBP/UBF/UBFN/UBFT Note: xxxFN (JEDEC SOP) is not available in Japan. TC4069UBP TC4069UBF TC4069UBFN TC4069UBFT eight W DIP14-P-300-2.54 : 0.96 g (typ.) SOP14-P-300-1.27A : 0.18 g (typ.) SOL14-P-150-1.27 : 0.12 g (typ.) TSSOP14-P-0044-0.65A : 0.06 g (typ.) 2007-10-01 ...

Page 2

... Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc) ...

Page 3

Static Electrical Characteristics Characteristics Symbol |I OUT High-level V OH output voltage OUT Low-level V OL output voltage Output high current ...

Page 4

Dynamic Electrical Characteristics Characteristics Output transition time (low to high) Output transition time (high to low) Propagation delay time (low to high) Propagation delay time (high to low) Input capacitance Waveform for Measurement of Dynamic Characteristics 20 ns Input Output ...

Page 5

Package Dimensions Weight: 0.96 g (typ.) TC4069UBP/UBF/UBFN/UBFT 5 2007-10-01 ...

Page 6

Package Dimensions Weight: 0.18 g (typ.) TC4069UBP/UBF/UBFN/UBFT 6 2007-10-01 ...

Page 7

Package Dimensions (Note) Note: This package is not available in Japan. Weight: 0.12 g (typ.) TC4069UBP/UBF/UBFN/UBFT 7 2007-10-01 ...

Page 8

Package Dimensions Weight: 0.06 g (typ.) TC4069UBP/UBF/UBFN/UBFT 8 2007-10-01 ...

Page 9

... Product shall not be used for or incorporated into any products or systems whose manufacture, use, or sale is prohibited under any applicable laws or regulations. • The information contained herein is presented only as guidance for Product use. No responsibility is assumed by TOSHIBA for any infringement of patents or any other intellectual property rights of third parties that may result from the use of Product. No license to any intellectual property right is granted by this document, whether express or implied, by estoppel or otherwise. • ...

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