P80C51BH Intel, P80C51BH Datasheet - Page 4

• Manufacturer Part Number: P80C51BH
• Manufacturer: Intel

Specifications of P80C51BH

• Cpu Family: MCS51
• Device Core Size: 8b
• Frequency (max): 16MHz
• Program Memory Type: ROM
• Program Memory Size: 4KB
• Total Internal Ram Size: 128Byte
• # I/os (max): 32
• Number Of Timers - General Purpose: 2
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 4.5V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 125C
• Operating Temperature Classification: Automotive
• Mounting: Through Hole
• Pin Count: 40
• Package Type: PDIP
• Lead Free Status / Rohs Status: Not Compliant

AUTOMOTIVE 80C31BH 80C51BH 87C51
PIN DESCRIPTION
V
Down operations
V
V
ground Provided to reduce ground bounce and im-
prove power supply bypassing
This pin is not a substitute for the V
For ROM and ROMless pin 1 is reserved do not
connect
Port 0 Port 0 is an 8-bit open drain bidirectional I O
port As an output port each pin can sink 8 LS TTL
inputs Port 0 pins that have 1s written to them float
and in that state can be used as high-impedance
inputs
Port 0 is also the multiplexed low-order address and
data bus during accesses to external memory In this
application it uses strong internal pullups when emit-
ting 1s
Port 0 also receives the code bytes during EPROM
programming and outputs the code bytes during
program verification External pullups are required
during program verification
Port 1 Port 1 is an 8-bit bidirectional I O port with
internal pullups Port 1 pins that have 1s written to
them are pulled high by the internal pullups and in
that state can be used as inputs As inputs Port 1
pins that are externally being pulled low will source
4
CC
SS
SS1
Do not connect reserved pins
EPROM only
Circuit ground
Supply voltage during normal Idle and Power
V
SS1
(EPROM
Diagrams are for pin reference only Package sizes are not to scale
Pin (PDIP)
NOTE
PLCC only) secondary
SS
pin (pin 22)
270419–3
Figure 3 Pin Connections
current (I
nal pullups
Port 1 also receives the low-order address bytes
during EPROM programming and program verifica-
tion
Port 2 Port 2 is an 8-bit bidirectional I O port with
internal pullups Port 2 pins that have 1s written to
them are pulled high by the internal pullups and in
that state can be used as inputs As inputs Port 2
pins that are externally being pulled low will source
current (I
nal pullups
Port 2 emits the high-order address byte during
fetches from external Program memory and during
accesses to external Data Memory that use 16-bit
address (MOVX
strong internal pullups when emitting 1s
During accesses to external Data Memory that use
8-bit addresses (MOVX
tents of the P2 Special Function Register
Port 2 also receives some control signals and the
high-order address bits during EPROM programming
and program verification
Port 3 Port 3 is an 8-bit bidirectional I O port with
internal pullups Port 3 pins that have 1s written to
them are pulled high by the internal pullups and in
that state can be used as inputs As inputs Port 3
pins that are externally being pulled low will source
current (I
ups
IL
IL
IL
on the data sheet) because of the inter-
on the datasheet) because of the inter-
on the datasheet) because of the pull-
DPTR) In this application it uses
Pad (PLCC)
Ri) Port 2 emits the con-
270419 – 4