CY7C187-15PC Cypress Semiconductor Corp, CY7C187-15PC Datasheet

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CY7C187-15PC

Manufacturer Part Number
CY7C187-15PC
Description
Manufacturer
Cypress Semiconductor Corp
Datasheet

Specifications of CY7C187-15PC

Density
64Kb
Access Time (max)
15ns
Operating Supply Voltage (typ)
5V
Package Type
DIP
Operating Temp Range
0C to 70C
Supply Current
90mA
Operating Supply Voltage (min)
4.5V
Operating Supply Voltage (max)
5.5V
Operating Temperature Classification
Commercial
Mounting
Through Hole
Pin Count
22
Word Size
1b
Lead Free Status / Rohs Status
Not Compliant

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Cypress Semiconductor Corporation
Document #: 38-05044 Rev. **
Features
Functional Description
The CY7C187 is a high-performance CMOS static RAM orga-
nized as 65,536 words x 1 bit. Easy memory expansion is pro-
Selection Guide
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum Standby Current (mA)
Note:
• High speed
• CMOS for optimum speed/power
• Low active power
• Low standby power
• TTL compatible inputs and outputs
• Automatic power-down when deselected
1.
A
A
A
A
— 15 ns
— 495 mW
— 220 mW
Logic Block Diagram
A
A
A
A
12
13
14
15
0
1
2
3
For military specifications, see the CY7C187A datasheet.
INPUT BUFFER
COLUMN DECODER
[1]
256 x 256
ARRAY
POWER
DOWN
3901 North First Street
7C187-15
40/20
15
90
C187–1
DI
DO
CE
WE
vided by an active LOW Chip Enable (CE) and three-state driv-
ers. The CY7C187 has an automatic power-down feature,
reducing the power consumption by 56% when deselected.
Writing to the device is accomplished when the Chip Enable
(CE) and Write Enable (WE) inputs are both LOW. Data on the
input pin (D
the address pins (A
Reading the device is accomplished by taking the Chip Enable
(CE) LOW, while Write Enable (WE) remains HIGH. Under
these conditions, the contents of the memory location speci-
fied on the address pin will appear on the data output (D
pin.
The output pin stays in high-impedance state when Chip En-
able (CE) is HIGH or Write Enable (WE) is LOW.
The CY7C187 utilizes a die coat to insure alpha immunity.
Pin Configurations
D
GND
OUT
WE
NC
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
7C187-20
IN
San Jose
Top View
10
11
12
) is written into the memory location specified on
40/20
1
2
3
4
5
6
7
8
9
20
80
SOJ
0
24
23
22
21
20
19
18
17
16
15
14
13
through A
C187–3
64K x 1 Static RAM
V
A
A
A
A
NC
A
A
A
A
D
CE
CC
15
14
13
12
11
10
9
8
IN
CA 95134
7C187-25
15
20/20
).
25
70
D
GND
Revised August 24, 2001
WE
OUT
A
A
A
A
A
A
A
A
0
1
2
3
4
5
6
7
Top View
1
2
3
4
5
6
7
8
9
10
11
DIP
CY7C187
408-943-2600
7C187-35
22
21
20
19
18
17
16
15
14
13
12
C187–2
20/20
35
70
V
A
A
A
A
A
A
A
A
D
CE
CC
15
14
13
12
11
10
9
8
IN
OUT
)

Related parts for CY7C187-15PC

CY7C187-15PC Summary of contents

Page 1

... The output pin stays in high-impedance state when Chip En- able (CE) is HIGH or Write Enable (WE) is LOW. The CY7C187 utilizes a die coat to insure alpha immunity. Pin Configurations ...

Page 2

... OUT V = Max OUT Max Max – 0.3V – 0. 0.3V IN Test Conditions T = 25° MHz 5. CY7C187 [2] .........................................–0.5V to +7.0V Ambient Temperature + 7C187-20 7C187-25, 35 Min. Max. Min. Max. 2.4 2.4 0.4 0.4 2 –0.5 0.8 –0.5 0.8 –5 +5 –5 +5 –5 +5 –5 +5 –350 –350 ...

Page 3

... R2 202 5 pF (R1 255 MIL) INCLUDING JIG AND SCOPE C187–4 (b) 1.73V [6] Description [7] [7, 8] [8] is less than t for any given device. HZCE LZCE CY7C187 ALL INPUT PULSES 3.0V 90% 90% 10% GND 5 ns 125 OUTPUT 1.90V Commercial 7C187-15 7C187-20 Min. Max. Min. Max ...

Page 4

... WE HIGH to Low LZWE t WE LOW to High Z HZWE Switching Waveforms [10, 11] Read Cycle No. 1 ADDRESS DATA OUT PREVIOUS DATA VALID Notes: 10 HIGH for read cycle. 11. Device is continuously selected Document #: 38-05044 Rev. ** [6] (continued) Description [7] [ OHA . IL CY7C187 7C187-25 7C187-35 Min. Max. Min. Max ...

Page 5

... If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state. Document #: 38-05044 Rev ACE 50 SCE PWE DATA VALID t HZWE SCE PWE t SD DATA VALID t HZCE DATA VALID LZWE HIGH IMPEDANCE HIGH IMPEDANCE CY7C187 HIGH IMPEDANCE ICC ISB C187–7 C187–8 C187–9 Page ...

Page 6

... OUTPUT VOLTAGE (V) OUTPUT SINK CURRENT vs. OUTPUT VOLTAGE 140 120 100 = 125 0.0 1.0 2.0 OUTPUT VOLTAGE (V) NORMALIZED I vs.CYCLE TIME CC 1.25 V =5. = =0.5V CC 1.00 0.75 0.50 1000 CYCLE FREQUENCY (MHz) CY7C187 =5.0V =25 C 3.0 4.0 =5.0V 3.0 4.0 40 Page ...

Page 7

... A10 Y0 A11 Y4 A12 Y5 A13 X0 A14 X1 A15 X2 [14] Ordering Information Speed (ns) Ordering Code 15 CY7C187-15PC CY7C187-15VC 20 CY7C187-20PC CY7C187-20VC 25 CY7C187-25PC CY7C187-25VC 35 CY7C187-35PC CY7C187-35VC Note: 14. For military variations, see the CY7C187A datasheet. Document #: 38-05044 Rev. ** Truth Table Pin CE WE Number H X High Data Out Data In ...

Page 8

... The inclusion of Cypress Semiconductor products in life-support systems application implies that the manufacturer assumes all risk of such use and in doing so indemnifies Cypress Semiconductor against all charges. 22-Lead (300-Mil) Molded DIP P9 24-Lead (300-Mil) Molded SOJ V13 CY7C187 51-85012-A 51-85030-A Page ...

Page 9

... Document Title: CY7C187 64K x 1 Static RAM Document Number: 38-05044 Issue REV. ECN NO. Date ** 107146 09/10/01 Document #: 38-05044 Rev. ** Orig. of Change Description of Change SZV Change from Spec number: 38-00038 to 38-05044 CY7C187 Page ...

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