P80C32 Intel, P80C32 Datasheet - Page 21

• Manufacturer Part Number: P80C32
• Manufacturer: Intel

Specifications of P80C32

• Cpu Family: 80C51
• Device Core: 8051
• Device Core Size: 8b
• Frequency (max): 12MHz
• Program Memory Type: ROMLess
• Program Memory Size: Not Required
• Total Internal Ram Size: 256Byte
• # I/os (max): 32
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 5V
• Operating Supply Voltage (max): 6V
• Operating Supply Voltage (min): 4V
• Instruction Set Architecture: CISC
• Operating Temp Range: 0C to 70C
• Operating Temperature Classification: Commercial
• Mounting: Through Hole
• Pin Count: 40
• Package Type: PDIP
• Lead Free Status / Rohs Status: Not Compliant

ROM and EPROM Lock System
The program lock system when programmed pro-
tects the onboard program against software piracy
The 80C5X has a one-level program lock system
and a 64-byte encryption table See line 2 of Table
5 If program protection is desired the user submits
the encryption table with their code and both the
lock-bit and encryption array are programmed by the
factory The encryption array is not available without
the lock bit For the lock bit to be programmed the
user must submit an encryption table
The 87C5X has a 3-level program lock system and a
64-byte encryption array Since this is an EPROM
device all locations are user-programmable See
Table 5
Encryption Array
Within the EPROM array are 64 bytes of Encryption
Array that are initially unprogrammed (all 1’s) Every
time that a byte is addressed during a verify 6 ad-
dress lines are used to select a byte of the Encryp-
tion Array This byte is then exclusive-NOR’ed
(XNOR) with the code byte creating an Encryption
Verify byte The algorithm with the array in the un-
programmed state (all 1’s) will return the code in its
original unmodified form For programming the En-
cryption Array refer to Table 4 (Programming the
EPROM)
When using the encryption array one important fac-
tor needs to be considered If a code byte has the
value 0FFH verifying the byte will produce the en-
cryption byte value If a large block (
code is left unprogrammed a verification routine will
display the contents of the encryption array For this
reason all unused code bytes should be pro-
grammed with some value other than 0FFH and not
all of them the same value This will ensure maxi-
mum program protection
Program Lock Bits
The 87C5X has 3 programmable lock bits that when
programmed according to Table 5 will provide differ-
ent levels of protection for the on-chip code and
data
l
64 bytes) of
Erasing the EPROM also erases the encryption ar-
ray and the program lock bits returning the part to
full functionality
Reading the Signature Bytes
The 8XC5X has 3 signature bytes in locations 30H
31H and 60H To read these bytes follow the proce-
dure for EPROM verify but activate the control lines
provided in Table 4 for Read Signature Byte
Erasure Characteristics
(Windowed Packages Only)
Erasure of the EPROM begins to occur when the
chip is exposed to light with wavelength shorter than
approximately 4 000 Angstroms Since sunlight and
fluorescent lighting have wavelengths in this range
exposure to these light sources over an extended
time (about 1 week in sunlight or 3 years in room-
level fluorescent lighting) could cause inadvertent
erasure If an application subjects the device to this
type of exposure it is suggested that an opaque la-
bel be placed over the window
The recommended erasure procedure is exposure
to ultraviolet light (at 2537 Angstroms) to an integrat-
ed dose of at least 15 W-sec cm
EPROM to an ultraviolet lamp of 12 000
rating for 30 minutes at a distance of about 1 inch
should be sufficient
Erasure leaves all the EPROM Cells in a 1’s state
Location
30H
31H
60H
Device
80C52
87C52
80C54
87C54
80C58
87C58
All
All
2
8XC52 54 58
Contents
Exposing the
89H
58H
12H
52H
14H
54H
18H
58H
W cm
21
2